A/D-conversion noisy - how to filter it?

[oldtoddler]

If you truely have filtered, noisless input on your ADC pin like you say...

As a start, increase your Sample Time and/or change your Clock Source. It's a good possibility that you are not letting the sampling Capacitor enough time to charge properly before you take your reading.

It's also a possibility you have set the wrong Justification for a WORD variable. Double-check this also.

Vdd is filtered by 4700uF and I got 12V/7.2Ah battery to feed +5V regulator -> power supply should be ok.

The input voltage should be stable since there are 10k resistor + 4700uF + 220nF capasitors in parallel (connected ANx -> Gnd) and there is 10-turn 10k potentiometer from Anx -> +5V, should make it steady enough - at least it looks that way in my scope.. I dunno..

ADCS is 010 (Fosc/32) - should be ok?

Increasing sampling time has unwanted, negative influence into responce time.. ok, I did increase sampling time up to 300uS and it did help quite a lot - still the measurement is jumpy, 508..516... that is best I can get out of it?

I will rewire all ground lines and let's see if that helps.

Thnx, if u have any ideas, please let me know!

[sayzer]

Since you are using 20 MHz OSC; Fosc/32 could be the solution as it helped me solve a similar problem I had (with 50uS sampling time).

Since you had good result with 300uS sampling time, with Fosc/32 you should be having much better result.



Could you also post the filter schematic? I would like to get some ideas how others design a filter in these types of issues.



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