If you are taking five samples every 10mS and sending those to five EEPROMs, you will have a delay of 50mS each time you write. Every other 10mS (the 20mS tick) you take six samples and you send that to six EEPROM's, so every other 10mS you have a 60mS EEPROM write delay. Obviously you can see the figures don't add up.

Upto six ADC samples every 10mS for 65 seconds, you therefore have 65*100*6 samples (assuming worst-case of 6 inputs). That's 39000 8-bit samples to store. Too small for one 24LC256 with 32k (bytes) of space.

To make page-write smoother (and since we cannot cross a page boundary) we should really write in a multiple - or less - of 64 bytes).

If therefore we take 6 samples each 10mS (omitting every other 10mS the sixth ADC reading and just saving a zero for convenience), we can take 60 samples into RAM and page write the lot once every 100mS. There will be four bytes left over on every page, but that wastage is offset by being able to access our data in neat 100mS slices. That means we're going to need to write 650 pages (too much for a single 24LC256).

You either need two 24LC256's or a single 24LC512. Which is your preference? and I'll do you some code to get you started accordingly.