This is one for the "Gurus" out there. I would like to use an external clock source at say 6 MHz on the XTAL input pin with the PLL enabled to get a 24 MHz system clock. My question is, would the internal clock stop if the input clock stopped? I am doing a video overlay for a client, and the horizontal syncs by stopping the clock. The internal clock must stop when the external clock stops. It works fine with the HS setting, but I would like to raise the clock speed without pushing the cmos gated oscillator too high in frequency.
With other PLL systems, when the sync pulse is removed, the internal oscillator free runs. This would be a bad thing! Any ideas?
Thanks,
Ron
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