Just wondering if doing something like this is a 'no no' wrt to the interrupt handlers...
....essentially 'toggling' between each comparator being 'interrupt' enabled (& where the other comparator enables/disables itself & its partner). I'm getting weird results, but that's probably cos the rest of my code isn't robustCode:CPM1_Interrupt_Handler: @ INT_DISABLE CMP1_INT [do some stuff here] @ INT_ENABLE CMP2_INT @ INT_RETURN CPM2_Interrupt_Handler: @ INT_DISABLE CMP2_INT [do some stuff here] @ INT_ENABLE CMP1_INT @ INT_RETURN- but just wanted to establish if it's ok to do this (especially if the comparators are interrupting rapidly due to them both rx'ing a rapidly changing input - and also each comparator potentially interrupting very closely in time)
Also, not having a clue about this kinda stuff, just wondering what's going on 'under the hood' so to speak....ie when an interrupt enable &/or disable is actioned as per the above? (does enabling/disabling in such a manner use a lot of processor clock cycles? Or is it pretty swift?)
Thanks.


- but just wanted to establish if it's ok to do this (especially if the comparators are interrupting rapidly due to them both rx'ing a rapidly changing input - and also each comparator potentially interrupting very closely in time)


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