Thanks Arch,

I looked in the manual and it says in section 19.2.2 under WTD POSTSCALER:

The WDT has a postscaler that can extend the WDT Reset period. The postscaler is selected at the time of the device programming, by the value written to the CONFIG2H configuration register. Below are the settings that I have pasted into my program and 128 is the highest setting that I can set for the postscaler.

@ __CONFIG _CONFIG2H, _WDT_ON_2H & _WDTPS_128_2H
;Configuration Byte 2H Options
'_WDT_ON_2H EQU H'FF' ; Watch Dog Timer enable
'_WDT_OFF_2H EQU H'FE'
'_WDTPS_128_2H EQU H'FF' ; Watch Dog Timer PostScaler count
'_WDTPS_64_2H EQU H'FD'
'_WDTPS_32_2H EQU H'FB'
'_WDTPS_16_2H EQU H'F9'
'_WDTPS_8_2H EQU H'F7'
'_WDTPS_4_2H EQU H'F5'
'_WDTPS_2_2H EQU H'F3'
'_WDTPS_1_2H EQU H'F1'

I don't quite understand the manual and really hope there is a work around for this. With the 16F877 I got the current draw down to an average of about 0.185 milliamps in sleep which I thought was pretty good. It would be nice to see what others have done with the 18F452's but so far I couldn't find any discussions about doing this. Maybe I should concider using a diferent chip that's better suited for battery operation. Do you have any ideas?

Thanks
jessey