Clock connection to DS1802 from 16F877A

[Mith]

I don't believe that using a 20mhz clock would even come close to working. If you look at the timing diagrams the clk has to transition low to high for each bit that you are reading in. The instruction clock of a pic running at 20mhz is running at 20mzh/4 = 5mhz. If you put the osc line to the clk input on the DS1802 then your clock will be transitioning much to fast. Try something like this:
Dedicate four lines for the interface, RST, CLK, D, C.
To read C use the shiftin, something like this (this is not tested and may have errors):

high RST 'data appears on C when rst transitions to high
input D 'left floating during read of the C line according to datasheet
shiftin C,CLK,0,[CDATA\16]
low RST

To write to the D line something like this should work:
high RST 'data appears on C when rst transitions to high
input C 'just to make sure that it doesn't interfere by holding high or low
shiftout D,CLK,0,[DDATA\16]
low RST

Again this is not tested but it seems to fit the specifications in the datasheet. You may have to adjust the mode values which are found on page 146 of the PBC manual.

By the way, the datasheet lists the maximun clk rate at 10mhz.