BUSY line technique

[Demon]

OK,

How does this process look:

- all PICs define BUSY LINE pin as INPUT.

- pull-up resistor on BUSY LINE.

- to transmit, a PIC checks if BUSY LINE is HIGH (available), BUSY LINE pin set LOW (busy). Pin is automatically set as OUTPUT by PBP LOW command.

- once finished transmitting, BUSY LINE pin is set HIGH (available), then sets pin as INPUT.

I figure it's going to be extemely bad luck for a 2nd PIC to see the line as available just when another PIC was in between checking the status of the line and setting it to busy.

Would a simple solution be adding a short delay and checking the status a 2nd time? Or am I worrying about something that will happen 'most likely' never.

Robert