I might have figured it out. It looks like I wasn't loading the full pointer into FSR0 since it's a 12-bit pointer. Also I hit on the POSTINC0 option, which is nifty. I believe the ISR should be something like this (see below). I am currently assuming that word arrays in PBP are allocated with the low byte in the lower address and the high byte at the next address (I need to verify this). Any errors in the code or any suggestions to consolidate instructions are much appreciated!

Code:
PULSE_WIDTH:
ASM
   movff  TMR3L, _pausetime           ; Read LB and store in variable 'pausetime' - also loads TMR3H into buffer
   movff  TMR3H, _pausetime + 1       ; Read HB from buffer
   lfsr   FSR0,  _ppm                 ; Load the full 12-bit address of ppm into FSR0
   movf   _ppm_n, W                   ; Get index value from variable 'ppm_n' for array address, store in WREG
   rlncf  WREG, W                     ; Multiply by 2 since ppm array is words (16bit)
   addwf  FSR0L, f                    ; Add offset to low byte of pointer
   movlw  0                           ; clear WREG although carry flag is still active in STATUS REGISTER bit 0 (pretty sure that's how it works?)
   addwfc FSR0H, f                    ; Add carry to high byte of pointer
   movf   _pausetime, W               ; Load pausetime LB into WREG  
   movwf  POSTINC0                    ; Store pausetime LB in ppm location and automatically increment FSR0
   movf   _pausetime + 1, W           ; Load pausetime HB into WREG     
   movwf  INDF0                       ; Store pausetime HB in ppm location
   incf   _ppm_n, f                   ; increment array index variable ppm_n
   bcf    _ppm_n, 4                   ; clear bit 4 so array starts over after index 15 (b1111)
   btg    _ppmwrite                   ; toggle ppmwrite to check if interrupt occured in main program
INT_RETURN
ENDASM