Thanks Richard,
I had actually read Romans article but, thankfully, my signal never shows two simultanouse tones - it's always one or the other which makes it easier.

I started with ZCD module but due to the nature of the signal I could not get reliable results (worked fine with waveform generator feeding it a symetric signal but I was unsucessfull in removing the DC-bias from the actual signal so had to abandon ZCD). Once again goes to show that simulations or even half-assed hardware tests doesn't (always) cut it.

Currently using a comparator with FVR at 2.048V to one input and the signal to the other. Comparator output drives TMR1 gate. TMR1 gate interrupt flag is used to signal "end of measurement". Pushing TMR1 values into an array, resetting TMR0 each time. When TMR0 overflows the line has been idle for 4ms which is my end of frame indicator.

/Henrik.