Change according to your needs.
Code:
#CONFIG
CONFIG OSC = XT ; XT oscillator
CONFIG OSCS = OFF ; Oscillator system clock switch option is disabled (main oscillator is source)
CONFIG PWRT = OFF ; PWRT disabled
CONFIG BOR = ON ; Brown-out Reset enabled
CONFIG BORV = 20 ; VBOR set to 2.0V
CONFIG WDT = ON ; WDT enabled
CONFIG WDTPS = 128 ; 1:128
CONFIG CCP2MUX = ON ; CCP2 input/output is multiplexed with RC1
CONFIG STVR = ON ; Stack Full/Underflow will cause RESET
CONFIG LVP = OFF ; Low Voltage ICSP disabled
CONFIG DEBUG = OFF ; Background Debugger disabled. RB6 and RB7 configured as general purpose I/O pins.
CONFIG CP0 = OFF ; Block 0 (000200-001FFFh) not code protected
CONFIG CP1 = OFF ; Block 1 (002000-003FFFh) not code protected
CONFIG CP2 = OFF ; Block 2 (004000-005FFFh) not code protected
CONFIG CP3 = OFF ; Block 3 (006000-007FFFh) not code protected
CONFIG CPB = OFF ; Boot Block (000000-0001FFh) not code protected
CONFIG CPD = OFF ; Data EEPROM not code protected
CONFIG WRT0 = OFF ; Block 0 (000200-001FFFh) not write protected
CONFIG WRT1 = OFF ; Block 1 (002000-003FFFh) not write protected
CONFIG WRT2 = OFF ; Block 2 (004000-005FFFh) not write protected
CONFIG WRT3 = OFF ; Block 3 (006000-007FFFh) not write protected
CONFIG WRTC = OFF ; Configuration registers (300000-3000FFh) not write protected
CONFIG WRTB = OFF ; Boot Block (000000-0001FFh) not write protected
CONFIG WRTD = OFF ; Data EEPROM not write protected
CONFIG EBTR0 = OFF ; Block 0 (000200-001FFFh) not protected from Table Reads executed in other blocks
CONFIG EBTR1 = OFF ; Block 1 (002000-003FFFh) not protected from Table Reads executed in other blocks
CONFIG EBTR2 = OFF ; Block 2 (004000-005FFFh) not protected from Table Reads executed in other blocks
CONFIG EBTR3 = OFF ; Block 3 (006000-007FFFh) not protected from Table Reads executed in other blocks
CONFIG EBTRB = OFF ; Boot Block (000000-0001FFh) not protected from Table Reads executed in other blocks
#ENDCONFIG
Ioannis
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