K42 and Timer Interrupts

[tumbleweed]

Two things...

Since you're using FOSC/4 as the source, set ASYNC bit in T0CON1.

Also, when using 16 bit mode (MD16=1) you should always write TMR0H then TMR0L in that order so that the high byte is latched.

[Ioannis]

looks like not reloading the tmr count every ms....... after first int, tmr counter looping from 0 .....???

Sure it is. Inside the ISR, Timer 0 is stopped, reloaded and restarted.

Two things...

Since you're using FOSC/4 as the source, set ASYNC bit in T0CON1.

Also, when using 16 bit mode (MD16=1) you should always write TMR0H then TMR0L in that order so that the high byte is latched.

I think is it obligatory to use Fosc/4. Unless I misunderstood the DS. Then why is it necessary to use ASYNC=1? Could not fine any notes on the DS.

Same for TMR0H. Is it in the DS this?

Thank you for the suggestions, will test them the soonest.

Ioannis

[tumbleweed]

The SYNC block uses FOSC/4 as its sync clock, so it's difficult to use it if it's using FOSC/4 as its input source for counting too.



for 16-bit read/write see sec 20.1.1.1:



In 16-bit mode the operations should be: write TMR0H, TMR0L and read TMR0L, TMR0H

[Ioannis]

Thanks for the explanation.

I misinterpreted these paragraphs. My understanding was to have ASYNC cleared and use Fosc/4.

Ioannis