
Originally Posted by
richard
more robust demand/response handshaking...
Once I TX data, I waited till TX complete:
The TXIF flag does not indicate transmit completion (use TRMT for this purpose instead).
(16F18855 p.146)
Then I sit in a loop waiting for RX interrupt:
To ensure that no actual data is lost, check the RCIDL bit to verify that a receive operation is not in process...
(16F18855 p.553)
Code:
;--- Interrupts ----------------------------------------------------------------
RXInterrupt:
hserin [ STR MsgData\3 ]
while BAUDCON1.6 = 0 ' Check RCIDL bit
wend
RXoccurred = 1 ' Set flag
@ INT_RETURN
;--- Subroutines ---------------------------------------------------------------
SendData:
hserout [ MsgData[0], MsgData[1], MsgData[2] ]
while TX1STA.1 = 0 ' Check TRMT bit
wend
while RXoccurred = 0 ' Check for interrupt
wend
RXoccurred = 0 ' Set flag
ADCchange = 1
RETURN
I turned the pot pretty fast and this is the fastest interval I got from start of 1st TX to start of 2nd TX:

I'm still studying your TX/RX module. At least now I have a control that I can compare with.
Bookmarks