more robust demand/response handshaking
Code:
;pic18f26k22
#CONFIG
CONFIG FOSC = INTIO67 ; Internal oscillator block
CONFIG PLLCFG = OFF ; Oscillator used directly
CONFIG PRICLKEN = OFF ; Primary clock can be disabled by software
CONFIG FCMEN = OFF ; Fail-Safe Clock Monitor disabled
CONFIG IESO = OFF ; Oscillator Switchover mode disabled
CONFIG PWRTEN = OFF ; Power up timer disabled
CONFIG BOREN = SBORDIS ; Brown-out Reset enabled in hardware only (SBOREN is disabled)
CONFIG BORV = 190 ; VBOR set to 1.90 V nominal
CONFIG WDTEN = ON ; WDT is always enabled. SWDTEN bit has no effect
CONFIG WDTPS = 32768 ; 1:32768
CONFIG CCP2MX = PORTC1 ; CCP2 input/output is multiplexed with RC1
CONFIG PBADEN = OFF ; PORTB<5:0> pins are configured as digital I/O on Reset
CONFIG CCP3MX = PORTB5 ; P3A/CCP3 input/output is multiplexed with RB5
CONFIG HFOFST = ON ; HFINTOSC output and ready status are not delayed by the oscillator stable status
CONFIG T3CMX = PORTC0 ; T3CKI is on RC0
CONFIG P2BMX = PORTB5 ; P2B is on RB5
CONFIG MCLRE = INTMCLR ; MCLR pin enabled, RE3 input pin disabled
CONFIG STVREN = ON ; Stack full/underflow will cause Reset
CONFIG LVP = OFF ; Single-Supply ICSP disabled
CONFIG XINST = OFF ; Instruction set extension and Indexed Addressing mode disabled (Legacy mode)
CONFIG DEBUG = OFF ; Disabled
CONFIG CP0 = OFF ; Block 0 (000800-001FFFh) not code-protected
CONFIG CP1 = OFF ; Block 1 (002000-003FFFh) not code-protected
CONFIG CP2 = OFF ; Block 2 (004000-005FFFh) not code-protected
CONFIG CP3 = OFF ; Block 3 (006000-007FFFh) not code-protected
CONFIG CPB = OFF ; Boot block (000000-0007FFh) not code-protected
CONFIG CPD = OFF ; Data EEPROM not code-protected
CONFIG WRT0 = OFF ; Block 0 (000800-001FFFh) not write-protected
CONFIG WRT1 = OFF ; Block 1 (002000-003FFFh) not write-protected
CONFIG WRT2 = OFF ; Block 2 (004000-005FFFh) not write-protected
CONFIG WRT3 = OFF ; Block 3 (006000-007FFFh) not write-protected
CONFIG WRTC = OFF ; Configuration registers (300000-3000FFh) not write-protected
CONFIG WRTB = OFF ; Boot Block (000000-0007FFh) not write-protected
CONFIG WRTD = OFF ; Data EEPROM not write-protected
CONFIG EBTR0 = OFF ; Block 0 (000800-001FFFh) not protected from table reads executed in other blocks
CONFIG EBTR1 = OFF ; Block 1 (002000-003FFFh) not protected from table reads executed in other blocks
CONFIG EBTR2 = OFF ; Block 2 (004000-005FFFh) not protected from table reads executed in other blocks
CONFIG EBTR3 = OFF ; Block 3 (006000-007FFFh) not protected from table reads executed in other blocks
CONFIG EBTRB = OFF ; Boot Block (000000-0007FFh) not protected from table reads executed in other blocks
#ENDCONFIG
define OSC 64
ANSELC = 0
OSCCON = $70
OSCTUNE.6 = 1
RCSTA = $90 ' Enable serial port & continuous receive
TXSTA = $24 ' Enable transmit, BRGH = 1
SPBRG = 21 ' 57600 Baud @ 64MHz, -0.08%
SPBRGH = 1
BAUDCON.3 = 1 ' Enable 16 bit baudrate generator
asm
ADCcode = _MsgData
Num0 = _MsgData + 1
Num1 = _MsgData + 3
Num2 = _MsgData + 5
Num3 = _MsgData + 7
Num4 = _MsgData + 9
Num5 = _MsgData + 11
Num6 = _MsgData + 13
Num7 = _MsgData + 15
Num8 = _MsgData + 17
Num9 = _MsgData + 19
endasm
MsgOK var byte[2]
MsgLoop VAR WORD
MsgData var byte[21]
ADCcode var BYTE ext
Num0 VAR WORD ext
Num1 VAR WORD ext
Num2 VAR WORD ext
Num3 VAR WORD ext
Num4 VAR WORD ext
Num5 VAR WORD ext
Num6 VAR WORD ext
Num7 VAR WORD ext
Num8 VAR WORD ext
Num9 VAR WORD ext
Mainloop:
ADCcode = 2
for MsgLoop = 0 to 390 step 10 ' loop by multiples of 10
tol:
hserin 50,tol,[ wait("<OK>") ]
gosub TransmitData
next MsgLoop
goto mainloop
end
TransmitData:
Num0 = MsgLoop
Num1 = MsgLoop + 1
Num2 = MsgLoop + 2
Num3 = MsgLoop + 3
Num4 = MsgLoop + 4
Num5 = MsgLoop + 5
Num6 = MsgLoop + 6
Num7 = MsgLoop + 7
Num8 = MsgLoop + 8
Num9 = MsgLoop + 9
hserout [ "[",21,str MsgData\21]
RETURN
rx
Code:
;pic18f26k22
#CONFIG
CONFIG FOSC = INTIO67 ; Internal oscillator block
CONFIG PLLCFG = ON ; Oscillator used directly
CONFIG PRICLKEN = OFF ; Primary clock can be disabled by software
CONFIG FCMEN = OFF ; Fail-Safe Clock Monitor disabled
CONFIG IESO = OFF ; Oscillator Switchover mode disabled
CONFIG PWRTEN = OFF ; Power up timer disabled
CONFIG BOREN = SBORDIS ; Brown-out Reset enabled in hardware only (SBOREN is disabled)
CONFIG BORV = 190 ; VBOR set to 1.90 V nominal
CONFIG WDTEN = ON ; WDT is always enabled. SWDTEN bit has no effect
CONFIG WDTPS = 32768 ; 1:32768
CONFIG CCP2MX = PORTC1 ; CCP2 input/output is multiplexed with RC1
CONFIG PBADEN = OFF ; PORTB<5:0> pins are configured as digital I/O on Reset
CONFIG CCP3MX = PORTB5 ; P3A/CCP3 input/output is multiplexed with RB5
CONFIG HFOFST = ON ; HFINTOSC output and ready status are not delayed by the oscillator stable status
CONFIG T3CMX = PORTC0 ; T3CKI is on RC0
CONFIG P2BMX = PORTB5 ; P2B is on RB5
CONFIG MCLRE = INTMCLR ; MCLR pin enabled, RE3 input pin disabled
CONFIG STVREN = ON ; Stack full/underflow will cause Reset
CONFIG LVP = OFF ; Single-Supply ICSP disabled
CONFIG XINST = OFF ; Instruction set extension and Indexed Addressing mode disabled (Legacy mode)
CONFIG DEBUG = OFF ; Disabled
CONFIG CP0 = OFF ; Block 0 (000800-001FFFh) not code-protected
CONFIG CP1 = OFF ; Block 1 (002000-003FFFh) not code-protected
CONFIG CP2 = OFF ; Block 2 (004000-005FFFh) not code-protected
CONFIG CP3 = OFF ; Block 3 (006000-007FFFh) not code-protected
CONFIG CPB = OFF ; Boot block (000000-0007FFh) not code-protected
CONFIG CPD = OFF ; Data EEPROM not code-protected
CONFIG WRT0 = OFF ; Block 0 (000800-001FFFh) not write-protected
CONFIG WRT1 = OFF ; Block 1 (002000-003FFFh) not write-protected
CONFIG WRT2 = OFF ; Block 2 (004000-005FFFh) not write-protected
CONFIG WRT3 = OFF ; Block 3 (006000-007FFFh) not write-protected
CONFIG WRTC = OFF ; Configuration registers (300000-3000FFh) not write-protected
CONFIG WRTB = OFF ; Boot Block (000000-0007FFh) not write-protected
CONFIG WRTD = OFF ; Data EEPROM not write-protected
CONFIG EBTR0 = OFF ; Block 0 (000800-001FFFh) not protected from table reads executed in other blocks
CONFIG EBTR1 = OFF ; Block 1 (002000-003FFFh) not protected from table reads executed in other blocks
CONFIG EBTR2 = OFF ; Block 2 (004000-005FFFh) not protected from table reads executed in other blocks
CONFIG EBTR3 = OFF ; Block 3 (006000-007FFFh) not protected from table reads executed in other blocks
CONFIG EBTRB = OFF ; Boot Block (000000-0007FFh) not protected from table reads executed in other blocks
#ENDCONFIG
define OSC 64
ANSELC = 0
include "strtok.pbpmod"
OSCCON = $70
OSCTUNE.6 = 1
RCSTA = $90 ' Enable serial port & continuous receive
TXSTA = $24 ' Enable transmit, BRGH = 1
SPBRG = 21 ' 57600 Baud @ 64MHz, -0.08%
SPBRGH = 1
BAUDCON.3 = 1 ' Enable 16 bit baudrate generator
asm
ADCcode = _MsgData
Num0 = _MsgData + 1
Num1 = _MsgData + 3
Num2 = _MsgData + 5
Num3 = _MsgData + 7
Num4 = _MsgData + 9
Num5 = _MsgData + 11
Num6 = _MsgData + 13
Num7 = _MsgData + 15
Num8 = _MsgData + 17
Num9 = _MsgData + 19
endasm
incoming var byte[21]
MsgData var byte[21]
ADCcode var BYTE ext
Num0 VAR WORD ext
Num1 VAR WORD ext
Num2 VAR WORD ext
Num3 VAR WORD ext
Num4 VAR WORD ext
Num5 VAR WORD ext
Num6 VAR WORD ext
Num7 VAR WORD ext
Num8 VAR WORD ext
Num9 VAR WORD ext
Pause 1000 ' Let PIC stabilize and start after RX PIC
Mainloop:
hserout [ "<OK>"]
hserin 50,mainloop,[ wait("[",21), STR incoming \21]
if incoming[0] = 2 then
strcpy MsgData , incoming ,21
hserout [ "[", dec4 Num0, _
" ", dec4 Num1, " ", dec4 Num2, " ", dec4 Num3, _
" ", dec4 Num4, " ", dec4 Num5, " ", dec4 Num6, _
" ", dec4 Num7, " ", dec4 Num8, " ", dec4 Num9, "]",13,10]
hserout [ 10] ' this is just to maintain alignment on Serial Communicator
endif
GOTO Mainloop
end
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