Using VREF pins for pots that don't reach ADC=0 or 255

[Demon]

[QUOTE=richard;157122]define tolerance its not a general parameter for pot ratings, resistance should not be relevant... [/[QUOTE]

I meant would a 1K or 2K pot be "generally" better for ADC on a 16F18855.


[QUOTE]...Resistance:
The total resistance of the potentiometer, measured from one terminal to the other... [/[QUOTE]

5K, linear


[QUOTE]...Rated power :
The maximum amount of power the potentiometer can handle without overheating or failing...[/[QUOTE]

Rated power: 0.05W
Switch rated power: 12 VDC at 1.0A max


[QUOTE]...Resolution :
The accuracy of the potentiometer's resistance changes
Expressed as a percentage of the total resistance...[/[QUOTE]

I don't see this spec in the datasheet


[QUOTE]...Temperature coefficient :
How the resistance of the potentiometer changes with temperature...[/[QUOTE]

20℃-75℃:△R/R≤±5%
-25℃-20℃:△R/R≤±4.5%


[QUOTE]...Mechanical life:
The expected lifespan of the potentiometer
Usually expressed as the number of cycles it can endure...[/[QUOTE]

10,000 Cycles min.


[QUOTE]...Taper :
The relationship between the mechanical position and resistance ratio
The most common types are linear and logarithmic...[/[QUOTE]

Linear, (1B);B1 on Bourns pot specs


[QUOTE]...what is a weak pot...[/[QUOTE]

A noisy piece of crap that doesn't go anywhere near the full range of 0-5000ohms.


[QUOTE]...only that acquisition time is lower, a 10k pot could have 10 ohm resolution
in order to have "stable" 10bit result from a 10 bit ADC you would need 16 times over sampling.

to begin with you would need 16 times over sampling or use a 12 bit adc.
are you using 10 turn pots?...[/[QUOTE]

1 turn, 300 degrees


[QUOTE]...i cannot see how 0.25 degree resolution is useful for a 270 degree pot, most humans would be lucky to move it accurately in 2.00 degree increments

how is that going to work if the pots are not all identical, i have not encountered a pot that has a wiper that doesn't read 0 ohms to an end terminals at extreme rotation on my multimeter low ohms scale. how badly off are these pots . it would be easier to get better stock...[/[QUOTE]

I'm solo in this venture, so money is not unlimited, unfortunately.

...in c i usually use a map function to get desired result range from an expected input range, about 1000 times easier and vastly more flexible than any hardware solution

int16_t map(int16_t x, int16_t in_min, int16_t in_max, int16_t out_min, int16_t out_max)
{
return (long) (x - in_min) * (out_max - out_min) / (in_max - in_min) + out_min;
}

1. I could have a QC test and fail any pot below a certain spec.

2. I could add code to calibrate each pot after assembly, and store a "conversion formula" in memory.

3. I'm hoping a combination of:

- raising VREF- to 0.5V,
- FVRx4,
- Henrik's idea in previous post can produce acceptable results.


There's only so much you can do on a limited budget.

[Demon]

AAAH CRAP!

My end quotes are whacked ( [/[QUOTE]), and it won't let me edit the post...

[richard]

whether your pot is 4.7k or 5.2k should make zero difference , an adc reading of a pot is ratio metric
if both pots are at 50% reading is vdd/2 no matter what the resistance is

[Demon]

whether your pot is 4.7k or 5.2k should make zero difference , an adc reading of a pot is ratio metric
if both pots are at 50% reading is vdd/2 no matter what the resistance is

I set at 200ohm on multimeter to get more accurate reading:

left pin to wiper = 2.5R
right pin to wiper = 2.6R
left to right = 4K7

It doesn't go all the way down to 0, or up to 5K.

ADC readings for this pot are 2 - 254 (I had removed 2 bottom bits).


EDIT: I was using 20K setting for all readings before.

[Demon]

I went back and did same readings at 200 ohms on the other pot that had ADC from 0 - 255:

left pin to wiper = 2.5R
right pin to wiper = 1.9R
left to right = 5.05K (at 20K ohms)

[richard]

10 bit adc with vref of 4.048 v = 3.95mV / step

2.6 ohm/4700ohm * 5.00 v vdd = 2.76 mV

the error does not match , your figures are out by 400%

[Ioannis]

That 2.5ohms is just OK. You should read 0 or 255 at the ends of the pot.

Ioannis

[Demon]

[U]...ADC readings for this pot are 2 - 254 ([I]I had removed 2 bottom bits...

I'm an idiot. I thought I was being smart by ignoring any ADC variation under 3, turns out I was causing my own problem.

    if ADCinput <> oldADC1 then
        ADCinput = ADCinput >> 2
        if ADCinput < oldADC1 then
            ADCdiff = oldadc1 - adcinput
        else
            ADCdiff =  adcinput - oldadc1
        endif
        IF ADCdiff > 2 THEN
            ...process ADC,,,
...

If ADC falls on 1-2 or 253-254 as turned fully, it would never update when hitting 0 or 255.

It was just random luck it was always THAT pot that did it, and not the 2nd pot.

I should change my sig to:

"I'm my worst enemy"

[Demon]

16F18855 with 5K pot


So I have 2 rotary pots that refuse to go down to ADC=0. So I thought it was a perfect occasion to practice using Vref-.

I've gutted my code so there's only 1 pot being scanned:

#CONFIG
    __config _CONFIG1, _FEXTOSC_OFF & _RSTOSC_HFINT32 & _CLKOUTEN_OFF & _CSWEN_OFF & _FCMEN_ON
    __config _CONFIG2, _MCLRE_ON & _PWRTE_OFF & _LPBOREN_OFF & _BOREN_ON & _BORV_LO & _ZCD_OFF & _PPS1WAY_OFF & _STVREN_ON & _DEBUG_OFF
    __config _CONFIG3, _WDTCPS_WDTCPS_11 & _WDTE_OFF & _WDTCWS_WDTCWS_7 & _WDTCCS_LFINTOSC
    __config _CONFIG4, _WRT_OFF & _SCANE_available & _LVP_OFF
    __config _CONFIG5, _CP_OFF & _CPD_OFF
#ENDCONFIG

DEFINE OSC 32

DEFINE  ADC_BITS 10                 ' 10-bit Analog to digital
DEFINE  ADC_SAMPLEUS 5              ' Set sampling time in uS

DEFINE  HSER_RXREG PORTC
DEFINE  HSER_RXBIT 7
DEFINE  HSER_TXREG PORTC
DEFINE  HSER_TXBIT 6

DEFINE  HSER_RCSTA 90h              ' Enable serial port & continuous receive
DEFINE  HSER_TXSTA 24h              ' Enable transmit, BRGH = 1
Define  HSER_BAUD 115200
DEFINE  HSER_CLROERR 1              ' Clear overflow automatically
DEFINE  HSER_SPBRGH  0
DEFINE  HSER_SPBRG  68

;--- Setup registers -----------------------------------------------------------

BAUDCON.3 = 1                       ' Enable 16 bit baudrate generator
FVRCON = %0000000                  ' FIXED VOLTAGE REFERENCE CONTROL REGISTER
ADCON0 = %10000100                  ' ADC CONTROL REGISTER 0
'   bit 7   ADON: ADC Enable bit
'               1 = ADC is enabled
'   bit 2   ADFRM0: ADC results Format/alignment Selection
'               1 = ADRES and ADPREV data are right-justified
ADCON2 = %00000000                  ' ADC CONTROL REGISTER 2
'   bit 2-0 ADMD<2:0>: ADC Operating Mode Selection bits(1)
'               000 = Basic (Legacy) mode
ADCLK = %00001111                   ' ADC CLOCK SELECTION REGISTER
'   bit 5-0 ADCCS<5:0>: ADC Conversion Clock Select bits
'               1111 = FOSC/32
ADREF = %00010000                   ' ADC REFERENCE SELECTION REGISTER
'   bit 4 ADNREF: ADC Negative Voltage Reference Selection bit
'               1 = VREF- is connected to VREF- pin
'               0 = VREF- is connected to AVSS
'   bit 1-0 ADPREF: ADC Positive Voltage Reference Selection bits
'               11 = VREF+ is connected to FVR_buffer 1
'               10 = VREF+ is connected to VREF+ pin
'               00 = VREF+ is connected to VDD
WPUA = %11110011
WPUB = %11111111
WPUC = %00111111
ANSELA = %00010111                      ' Pin A4 = ADC (B10K)  ...  not implemented
                                        ' Pin A3 = SW input 3
                                        ' Pin A2 = Vref-
                                        ' Pin A1 = ADC (B5K w/SW)
                                        ' Pin A0 = ADC (B5K)
ANSELB = %00000000
ANSELC = %00000000
TRISA = %00011111                       ' Pin A4 = ...  not implemented
                                        ' Pin A3 = ...  not implemented
                                        ' Pin A2 = Vref-
                                        ' Pin A0 = ADC input 0
TRISB = %00000000                       ' Pin B7 = ...not available, ICSPDAT
                                        ' Pin B6 = ...not available, ICSPCLK
TRISC = %11000000                       ' Pin C7 = RX      *** Datasheet requirement, INPUT ***
                                        ' Pin C6 = TX      *** Datasheet requirement, INPUT ***
SW                  var PORTA.3         '  ...  not implemented

MsgData             var byte[3]
MsgCode             VAR BYTE

ADCinput            var WORD
ADCcalc             var WORD
ADCdiff             var WORD

OldADC              var WORD
OldADC0             var WORD
OldADC1             var WORD

    Pause 1500                           ' Let PIC and LCD stabilize

    OldADC0 = 9999

    goto Mainloop
    
;--- Subroutines ---------------------------------------------------------------

SendData:
    MsgData[0] = MsgCode   :   MsgData[1] = ADCcalc.byte1   :   MsgData[2] = ADCcalc.byte0
    hserout [   MsgData[0],    MsgData[1],  MsgData[2]   ]                             
    while TX1STA.1 = 0                                          ' Check TRMT bit
    wend

    oldADC0 = ADCcalc   
RETURN
    
Mainloop:
    
rem                             ADC A0 test
    MsgCode = 0                                                 ' Record type

    adcin 0, ADCinput
    ADCcalc = ADCinput >> 2
    
    if ADCcalc < oldADC0 then
        ADCdiff = oldADC0 - ADCcalc
    else
        ADCdiff =  ADCcalc - oldADC0
    endif

    IF  ADCdiff > 2 then                                        ' Check for Diff over 2
        if ADCcalc <> oldADC0 then                               ' ADC value changed
            GOSUB SendData                             
        endif
    ELSE
        IF  ADCdiff > 0 then                                    ' Check for Diff over 0
            if ADCcalc = 0 then                                 ' Reached end of rotation
                GOSUB SendData                             
            ELSE
                if ADCcalc = 255 then                           ' Reached end of rotation
                    GOSUB SendData                             
                endif
            endif
        endif
    endif

  GOTO Mainloop
end

I've added banks of caps on the wiper-to-VSS, as well as just before the VDD pin to the pot (0.1uF, 0.01uF and 0.001uF).

I shift right only 2 digits and that seems to have stabilized things quite a lot; no noticeable jitter so far tonight. 256 seems like a workable range for me so far.

The pot has a reading of 2.0mV when full right:




The Vref- pin reads at 15.7mV (used voltage divider 1K (0.985R really) / 3R:




Pot 0 does not go below ADC=12,and is transmitted on the Saleae probe:




And shows up nicely on LCD on 2nd PIC:




I don't get it. I thought setting Vref- at 15.7mV meant that anything reading below that would read as 0...? I thought I was essentially raising the VSS lower range for ADC.

ADREF = %00010000                   ' ADC REFERENCE SELECTION REGISTER
'   bit 4 ADNREF: ADC Negative Voltage Reference Selection bit
'               1 = VREF- is connected to VREF- pin
'               0 = VREF- is connected to AVSS

I'm obviously missing something stupid again, but I don't see what. Or I totally misunderstood what Vref- does in life.

[richard]

The pot has a reading of 2.0mV when full right:

each adc step is 4.88mV therefore it should read zero

you get a reading of 12 , after un-dividing by 4 that's a count of 48 or 0.234 volts
it virtually has to be power supply noise.
no amount of dicking around with reference voltage's is going to eliminate that much noise

eliminate your power supply as the culprit by using 3x fresh AA batteries in its place