10F222 no response?


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  1. #1


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    Default Re: 10F222 no response?

    Quote Originally Posted by HenrikOlsson View Post
    Since there is no #CONFIG in your code I reccon you know that the default ones are what you want? I don't have access to those at the moment but what about MCLR? Is it enabled in the default CONFIG and if so, do you have it pulled up?

    Also, looking at the datasheet there is no mention of TRISIO, it seems to be called TRISGPIO in that device. It's possible that the PBP header files aliases it and I suppose you should get an error if it doesn't know TRISIO but still...it sticks out.
    Thanks for your reply!

    Yup, I have MCLR set as MCLR, and also have the pullup option set AND have a 10k pullup externally. Name:  10F222 config.jpg
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    I tried using TRISGPIO first and it threw an error so I changed it to TRISIO and THEN it compiled without errors, so that's where I currently am.

    This has me stymied. I have tried another chip just in case, and I get the same results.

  2. #2
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    Default Re: 10F222 no response?

    You are compiling for the correct chip, 10F222?
    Not sure at this point but I had a look through my code folder I found one piece of code for the 10F222. It's likely something I wrote in response to a question on the forum:
    Code:
    '****************************************************************
    '*  Name    : Frequency Generator.pbp                           *
    '*  Author  : Henrik Olsson                                     *
    '*  Notice  : Copyright (c) 2017 Henrik Olsson                  *
    '*          : All Rights Reserved                               *
    '*  Date    : 2017-03-07                                        *
    '*  Version : 1.0                                               *
    '*  Notes   : For 10F222.                                       *
    '*          :                                                   *
    '****************************************************************
    #CONFIG
       __config _IOFSCS_8MHZ & _WDT_OFF & _MCLRE_OFF & _CP_OFF
    #ENDCONFIG
    
    DEFINE NO_CLRWDT 1             ' Forces manual use of CLRWDT
    
    GPIO = %0000
    TRISIO = %00111101
    ADCON0   = %01000001	       ' GPIO 0 = Analog, ADC Enabled
    
    SPK VAR GPIO.1
    Trigger VAR GPIO.2
    
    GO_DONE  VAR  ADCON0.1
    
    SomeValue CON 75
    SomeConstant CON 12
    
    Main:
    IF Trigger THEN
      GO_DONE = 1
      SPK = 1                ' Set pin high
      WHILE GO_DONE : WEND   ' AD conversion will always take the same amount of time
      PAUSEUS SomeValue + (ADRES * SomeConstant)
    
      GO_DONE = 1
      SPK = 0                ' Set pin low
      WHILE GO_DONE : WEND   ' AD conversion will always take the same amount of time
      PAUSEUS 16 + SomeValue + (ADRES * SomeConstant)
      ' The 16 above is to make the dutycycle closer to 50% than what it was
      ' without it. I'm quite surprised such a high number was needed and I'm
      ' not sure why that is.
    ENDIF
    Goto Main
    Looking at the code now, 8 years down the road, I see a forgot to DEFINE OSC 8 which might explain the comment towards the end. That same comment, however, seems to indicate it WAS tested on an actual hardware.

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