Re: Interrupt block with different exit?
dos this makes any sense to you?(sic)
there are a number of issues here
@ INT_DISABLE RBC_INT
this is most likely pointless. a pic can execute one and only one interrupt at a time, only a low priority interrupt can be interrupted
i will assume this is not one of them. once again code snippets are fairly useless as they never tell the whole story.
RBIF=0
once again code snippets are fairly useless they never tell the whole story. what port /pins is debug using. rbif can only be cleared if the portb mismatch condition has been cleared, there is no evidence this is happening.
see data sheet portb section re clearing mismatch condition.
performing all that serial comms in an isr is not a good practice.
if your code can tolerate that lengthy sort of interruption then there are most likely better ways to get a similar result other than by isr
its unclear which portb pins are inputs, which pin or pins have triggered the interrupt as you make no efforts to distinguish the source of the interrupt. this may or may not be relevant, snippets why bother
Warning I'm not a teacher
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