Without really thinking I changed DIV32 to 10000 and massaged the display code but obviously it only pushes the problem to when the high word is >10000.
yes biggest num is 655359999
this does a divide by 100000 first in asm and will do rest in pbp to encompass the entire 32 bit signed range



Code:
#config CONFIG RETEN=OFF
 CONFIG XINST = OFF ;Extended Instruction Set
 CONFIG FOSC = INTIO2 ;internal RC oscillator 
 CONFIG SOSCSEL=DIG
 CONFIG FCMEN = OFF   ;Fail-Safe Clock Monitor ****
 CONFIG IESO = OFF  ;Two-Speed Start-up is disabled
 CONFIG PLLCFG = OFF  ;4x xtal PLL 
 CONFIG PWRTEN = ON ;Power-up Timer
 CONFIG BOREN = SBORDIS ; Brown-out Reset Enabled in hardware, SBOREN disabled
 CONFIG BORPWR = HIGH ;BOR MV set to high power level
 CONFIG BORV = 2 ; Brown-out Reset  0=3v, 1=2.7v, 2=2v, 3=1.8v 
 CONFIG WDTEN = SWDTDIS ;ON ;OFF ;WDT enabled in hardware; SWDTEN bit disabled
 CONFIG WDTPS = 512 ;WDT     512*4Ms = 2 SECONDS 
 CONFIG RTCOSC = INTOSCREF  ; RTCC uses INTRC 
 CONFIG  MCLRE = ON
 CONFIG STVREN = ON ;Stack Full/Underflow Reset
 CONFIG DEBUG = OFF ;Background Debugger 
 CONFIG CP0 = OFF  ;code-protected
 CONFIG CP1 = OFF
 CONFIG CP2 = OFF
 CONFIG CP3 = OFF
 CONFIG CP4 = OFF
 CONFIG CP5 = OFF
 CONFIG CP6 = OFF
 CONFIG CP7 = OFF
 CONFIG CPB = OFF ;Boot Block Code Protection
 CONFIG CPD = OFF ;Data EEPROM Code Protection
#endconfig


DEFINE OSC 64 
DEFINE DEBUG_REG PORTD         
DEFINE DEBUG_BIT 4
DEFINE DEBUG_BAUD 9600 
DEFINE DEBUG_MODE 0  '0=TRUE 1=INVERTER




    OSCCON=110100 
    OSCTUNE.6=1 'Frequency Multiplier PLL Enable bit FOR INIT RC 
    TRISD=$ed
    ANCON0=0 'AN0-AN7 digital port
    ANCON1=0 'AN8-AN15 digital port
    ANCON2=0 'AN16-AN23 dig


    PSPCON.4=0 'General Purpose I/O mode 'PSPMODE: Parallel Slave Port Mode Select bit
    
    Test     var byte[3] SYSTEM
    Dividend   var byte[6] SYSTEM
    Remainder  var byte[4] SYSTEM      ; remainder from 1000000 division
    Shift  var byte[6] SYSTEM
    Counter  VAR BYTE  SYSTEM
    Hours     VAR WORD[2]    ; 32-bit (Dword) Holds up to 99999.9 hours
    HoursH    VAR Hours(1)
    HoursL    Var Hours(0)
    QUOTL     VAR WORD EXT       ; top 5 digits
    Result    Var Word           ;  middle 10,000;s  single digit 
    Remains Var Word             ; bottom 4 digits
    i var byte
goto overasm
 Asm
QUOTL=Dividend 
PutMulResult?D macro Din
    MOVE?BB   Din, R2
    MOVE?BB   Din + 1 , R2 + 1
    MOVE?BB   Din + 2, R0
    MOVE?BB   Din + 3, R0 + 1
    RST?RP
  endm
PutDIV?D macro Din
    MOVE?BB   Din, Dividend 
    MOVE?BB   Din + 1 , Dividend  + 1
    MOVE?BB   Din + 2, Dividend   + 2
    MOVE?BB   Din + 3, Dividend  + 3
    MOVE?CB   0 ,   Dividend  + 4
    MOVE?CB   0 ,   Dividend  + 5
    RST?RP
  endm 
  
  
  
EndAsm    
Remainder[3]=0    
overasm:
    HoursL=$fff0
    HoursH=$7fff
    latd=18
    debug "ready",13,10
    pause 1000
   






MainLoop:
    gosub AddHourTenth
    Gosub ShowHourMeter
goto MainLoop    ;============================================================






AddHourTenth:
    HoursL = HoursL + 1
    IF HoursL = 0 then HoursH = HoursH + 1
return




ShowHourMeter:
    Test    [0]=$a0       ;divisor 100000
    Test    [1]=$86
    Test    [2]=1
    
@   PutDIV?D  _Hours
    CALL  Div4824U      ;divide by 100000
     debug  ,13,10


@   PutMulResult?D  Remainder
    Result = DIV32 10000
    Remains = R2
    debug DEC QUOTL, Dec1 Result, ".",DEC4 Remains ,13,10
    pause 1000
return   


;**************************************************************************
;Div4824U
;Inputs:
;    Dividend - Dividend:6    (0 - least significant!)
;    Divisor     - Test:3    (0 - least significant!)
;Temporary:
;    Counter     - Count
;    Shift     - Shift:6
;Output:
;    Quotient - Dividend:6    (0 - least significant!)
;    Remainder- Rem:3    (0 - least significant!)
;
;Adaptation of 24x24 division by Tony Nixon with corrections
;by Frank Finster 3/15/2005.
;Code adapted by Andy Lee
;01-Sep-2006    Original version
;**************************************************************************


Div4824U:
asm
;---------------------------------------------------
; SUBROUTINE - 48 by 24 BIT DIVISION
    movlw 48
    movwf Counter
    movff Dividend+0, Shift+0
    movff Dividend+1, Shift+1
    movff Dividend+2, Shift+2
    movff Dividend+3, Shift+3
    movff Dividend+4, Shift+4
    movff Dividend+5, Shift+5
    clrf Dividend+0
    clrf Dividend+1
    clrf Dividend+2
    clrf Dividend+3
    clrf Dividend+4
    clrf Dividend+5
    clrf Remainder+2
    clrf Remainder+1
    clrf Remainder+0
dloop
    bcf STATUS, C
    rlcf Shift+0
    rlcf Shift+1
    rlcf Shift+2
    rlcf Shift+3
    rlcf Shift+4
    rlcf Shift+5
    rlcf Remainder+0
    rlcf Remainder+1
    rlcf Remainder+2
    movf Test+2, w
    subwf Remainder+2, w
    btfss STATUS, Z
    bra nochk
    movf Test+1,w
    subwf Remainder+1,w
    btfss STATUS, Z
    bra nochk
    movf Test+0,w
    subwf Remainder+0,w
nochk
    btfss STATUS, C
    bra nogo
    movf Test+0,w
    subwf Remainder+0
    btfsc STATUS, C
    bra    nodec_remainM
    decf Remainder+1, f
    movf Remainder+1, w
    xorlw 0xff
    btfsc STATUS, Z
    decf Remainder+2, f
nodec_remainM
    movf Test+1, w
    subwf Remainder+1, f
    btfss STATUS, C
        decf Remainder+2, f
    movf Test+2, w
    subwf Remainder+2, f
    bsf STATUS, C
nogo
    rlcf Dividend+0
    rlcf Dividend+1
    rlcf Dividend+2
    rlcf Dividend+3
    rlcf Dividend+4
    rlcf Dividend+5
    decfsz Counter, f
    goto dloop
    return
 
 endasm