Not yet, I wanted to get as close to a "finalized design" before using JLCPCB's quote generator.
I didn't know that about the lower ESR.
EDIT the CAPS section
I just noticed the datasheet has a range of output capacitance at 5V from 25 to 100uF (table 4). So I just added 10uF and 1uF ceramics alongside the 47uF.
These guys have a nice bla-bla about "why there can be too much output capacitance on SMPS circuits":
https://www.cui.com/blog/understandi...citance-limits
Thanks, but I can't really take credit for the design. I feel like Mr. Bean copying the test answers from the guy next to him. I really did put a lot of effort to do as close to what TI recommends.
As for "Kicad expert", that remains to be seen.![]()
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