SOLVED: How can I reduce ADC jitter

[Ioannis]

Based on the fact that you are using Power Supply as a reference voltage for the ADC:

1. the Power Supply noise is random and in the length of time it would have very minimal effect on the adc average value.

2. you are feeding the ADC input from a resistor divider that is connected to the Vdd, where also the reference voltage is connected to. It is called ratiometric and should zero the effect of regulator voltage drift. If the voltage of the Resistor divider changes by x % then the reference voltage will change by x % too. So eventually no drift should happen.

What you experience is strange and should not happen.

Needs more investigation.

If you heat or cool the PIC chip, is there any change?

Ioannis

P.S. If you finally use external Voltage reference, that is reasonably stable, I feel that the results will be even worse, because then the Vdd change will have maximum effect on the voltage sample.