SOLVED: How can I reduce ADC drift

[Demon]

SOLVED: Noisy VDD/VSS using DC-DC converter. ADC stopped bouncing after using a 7805.

https://picbasic.co.uk/forum/showthr...527#post156527

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16F18877

- Using fixed input on ADC pin (1K to VDD, 1K to VSS - simulating pot at 50%)
- The ADC will drift from 498 to 509.

HSEROUTs on Serial Communicator:

Low=00498 High=00509

Is there anything in the registers that I can "tune" for the ADC?

#CONFIG
    __config _CONFIG1, _FEXTOSC_OFF & _RSTOSC_HFINT32 & _CLKOUTEN_OFF & _CSWEN_OFF & _FCMEN_ON
    __config _CONFIG2, _MCLRE_ON & _PWRTE_OFF & _LPBOREN_OFF & _BOREN_ON & _BORV_LO & _ZCD_OFF & _PPS1WAY_OFF & _STVREN_ON & _DEBUG_OFF
    __config _CONFIG3, _WDTCPS_WDTCPS_11 & _WDTE_OFF & _WDTCWS_WDTCWS_7 & _WDTCCS_LFINTOSC
    __config _CONFIG4, _WRT_OFF & _SCANE_available & _LVP_OFF
    __config _CONFIG5, _CP_OFF & _CPD_OFF
#ENDCONFIG

DEFINE OSC 32

DEFINE  ADC_BITS 10                 ' 10-bit Analog to digital

define  CCP1_REG     0              ' Must clear unused CCP pins or else unpredictable results
DEFINE  CCP1_BIT     0
define  CCP2_REG     0
DEFINE  CCP2_BIT     0
DEFINE  CCP3_REG     0
DEFINE  CCP3_BIT     0
define  CCP4_REG     0
DEFINE  CCP4_BIT     0
define  CCP5_REG     0              ' Must clear unused CCP pins or else unpredictable results
DEFINE  CCP5_BIT     0

DEFINE  HSER_RXREG PORTC
DEFINE  HSER_RXBIT 7
DEFINE  HSER_TXREG PORTC
DEFINE  HSER_TXBIT 6

DEFINE  HSER_RCSTA 90h              ' Enable serial port & continuous receive
DEFINE  HSER_TXSTA 24h              ' Enable transmit, BRGH = 1
Define  HSER_BAUD 115200
DEFINE  HSER_CLROERR 1              ' Clear overflow automatically
DEFINE  HSER_SPBRGH  0
DEFINE  HSER_SPBRG  68

BAUDCON.3 = 1                       ' Enable 16 bit baudrate generator

RA4PPS = 0                          ' Disable CCP5
RB0PPS = 0                          ' Disable CCP4
RB5PPS = 0                          ' Disable CCP3
RC1PPS = 0                          ' Disable CCP2
RC2PPS = 0                          ' Disable CCP1

IOCAP = %00000000                               'IOC Positive Edge, low-to-high
IOCAN = %00000000                               'IOC Negative Edge, from high-to-low
IOCBP = %00000000                               'IOC Positive Edge, low-to-high
IOCBN = %00000000                               'IOC Negative Edge, from high-to-low
IOCCP = %00000000                               'IOC Positive Edge, low-to-high
IOCCN = %00000000                               'IOC Negative Edge, from high-to-low
'IOCDP = %00000000                              '...not available
'IOCDN = %00000000                              '...not available
'IOCEP = %00000000                              '...not available
'IOCEN = %00000000                              '...not available

WPUA = %00000000                        ' Pull-up resistors
WPUB = %00000000
WPUC = %00000000
WPUD = %00000000
WPUE = %00000000

INLVLA = %00000000                      ' TTL input level
INLVLB = %00000000
INLVLC = %00000000
INLVLD = %00000000
'INLVLE = %00000000                      ' ...only available on E3 / MCLR pin

ADCON0 = %10000100                      ' ADC CONTROL REGISTER 0
ADCLK  = %00111111                      ' ADC CLOCK SELECTION REGISTER
'ADPCH  = %00011010                      ' Channel 26 - D2

ANSELA = %00000000
ANSELB = %00000000
ANSELC = %00000000
ANSELD = %00000110                      ' Pin D2 = ADC input, NavCom
                                        ' Pin D1 = ADC input, Glareshield
ANSELE = %00000000

TRISA = %00000000                       
TRISB = %00000000                       
TRISC = %00000000                       
TRISD = %00000110                       
TRISE = %00000000

include "I:\Project_v2\PBP\PBP_Includes\USART.bas"

ADCInput                var word

LowADC                  var word
HighADC                 var word

    Pause 1                                     ' Let PIC stabilize

    LowADC = 1023
    HighADC = 0
    AdcInput = 0

Mainloop:

    adcin 26, AdcInput
    
    if AdcInput < LowADC then LowADc = AdcInput
    if AdcInput > HighADC then HighADC = AdcInput
        
    hserout [   "Low=", dec5 LowADC, "  High=", DEC5 HighADC, 10  ]                             
 
    goto mainloop
end

I was getting desperate with the drift on the pots, so I thought I'd do a control run using resistors.

I expected it to remain the same or very close, but I'm still getting drift.

[richard]

50mV of noise on the power supply would do that.
using FVR as adc ref might help a little and or a better regulator for the pots

[Demon]

I use a DC-DC converter to lower 12V down to 5V for the entire circuit.

Would a dedicated 7805 for the pots be a "meaningful" improvement?

I'll have up to 10 pots in the final circuit. Right now I'm trying to get 1 ADC working well.

[richard]

Would a dedicated 7805 for the pots be a "meaningful" improvement?

the first step is to measure the noise on the power rail and then to determine if that's an issue, there is no point adding a regulator for the pots if the adc pos reference is noisy

[Ioannis]

Based on the fact that you are using Power Supply as a reference voltage for the ADC:

1. the Power Supply noise is random and in the length of time it would have very minimal effect on the adc average value.

2. you are feeding the ADC input from a resistor divider that is connected to the Vdd, where also the reference voltage is connected to. It is called ratiometric and should zero the effect of regulator voltage drift. If the voltage of the Resistor divider changes by x % then the reference voltage will change by x % too. So eventually no drift should happen.

What you experience is strange and should not happen.

Needs more investigation.

If you heat or cool the PIC chip, is there any change?

Ioannis

P.S. If you finally use external Voltage reference, that is reasonably stable, I feel that the results will be even worse, because then the Vdd change will have maximum effect on the voltage sample.

[Ioannis]

The Vdd that resistors are connected to, is the exact same point that PIC Vdd pin is connected also?

Ioannis

[Demon]

The Vdd that resistors are connected to, is the exact same point that PIC Vdd pin is connected also?

Ioannis

Yes, it is.

[Ioannis]

Temperature (heating or cooling PIC) has any effect on the drift?

Ioannis

[Demon]

Temperature (heating or cooling PIC) has any effect on the drift?

Ioannis

I'm curious how can this help me?

It is room temperature, just like target customer environment (gaming).

It's not like I'm overclocking the PIC like a PC CPU...?

[Ioannis]

If the ADC result has no or minimal effect because of temp then we have to look elsewhere for the drift.

Ioannis

[Aussie Barry]

I would try the following:

1/. Use the Fixed Voltage Reference (FVR) instead of Vdd as your ADC reference voltage.
2/. Add some capacitance - say 100nF - between the pot wiper and ground.

Cheers
Barry
VK2XBP

[Demon]

I would try the following:

1/. Use the Fixed Voltage Reference (FVR) instead of Vdd as your ADC reference voltage.
2/. Add some capacitance - say 100nF - between the pot wiper and ground.

Cheers
Barry
VK2XBP

1. Yeah, FVR is on my TO-DO list (Richard mentioned it up there).

2. Does it matter if the cap is at the switch or up against PIC (like decoupler caps).

3. Temp is also on my TO-DO list.

[richard]

also try using the fastest conversion clock that does not go Outside the recommended TAD time.
you are using the slowest possible clock
if you use the fvr don't let the wiper volts exceed the fvr output volts

[Aussie Barry]

It shouldn't really matter if the cap is at the PIC end or the Pot end, as long as the distance between both is not too great.
Note the silicon errata document (Item 1.3) regarding the use of FVR as ADC reference voltage:
https://ww1.microchip.com/downloads/...-80000702J.pdf

Cheers
Barry

[Aussie Barry]

if you use the fvr don't let the wiper volts exceed the fvr output volts

What happens if the wiper voltage exceeds the FVR voltage?

[Aussie Barry]

16F18877


Is there anything in the registers that I can "tune" for the ADC?

The PIC16F18877 has an Analog-to-Digital converter with Computation
These post-processing functions are applied to the ADC conversion result and include averaging and low-pass filtering.

Cheers
Barry

[richard]

What happens if the wiper voltage exceeds the FVR voltage?

Ain specs from datasheet




at best the top range of the pot would be useless

[Ioannis]

Using FVR will make things worse...

Ioannis

[Demon]

I thought I'd step back and check VDD and VSS using my SDS1104 scope.

This is at 50mV:




Is it realistic to expect no drift on ADC with this much noise on my lines?

[Demon]

CONFIRMED: Noisy power definitely messes up everything when the PIC tries to compare the "wiper" reading with VDD/VSS, even using two 1K resistors to simulate 50% pot.

I switched to a 7805 supply and put back my "supposedly dirty" potentiometer. ADC low/high was back to a steady reading no matter where I turned the pot.

I had code prepared using the techniques discussed in Melanie's ADC thread (or was it SORT, I don't remember). I got lost looking at the computational feature of the ADC in the 16F18877; that could have replaced my averaging routine and most likely reduced time.

At worse if I get a dirty pot, I can drop the 1-2 lower bits from the 10-bit reading and still get 512-256 resolution out of a maximum 1024.

[Demon]

I did an extra test to confirm it wasn't another component on my main test board that was "messing up" the power.

I powered my isolated PIC with that DC-DC converter and sure enough ADC was jumping between 546 and 569 using my pot.

So now i have to find a 7805 variant that can supply 700mA without breaking a sweat.

[Ioannis]

Drift is tottaly different than jumping numbers...

When you said drift I assumed that you started with say 512 as a 50% of FSD and then it went up or down after some time, like 511, 510, 509 etc.

Having random numbers sure can be due to crappy and noisy Voltage on Vdd.

Ioannis