Re: Symbol not prev defined FSR - Elapsed Timer
PIC 16F18877
Timer1 at 50ms intervals
Timer3 at 150ms intervals
Code:
Code:'*************************************************************************************************** ' * ' Generate trace on Interrupt on Logic Probe * ' * ' PIC 16F18877 * ' * '*************************************************************************************************** #CONFIG __config _CONFIG1, _FEXTOSC_OFF & _RSTOSC_HFINT32 & _CLKOUTEN_OFF & _CSWEN_OFF & _FCMEN_ON __config _CONFIG2, _MCLRE_ON & _PWRTE_OFF & _LPBOREN_OFF & _BOREN_ON & _BORV_LO & _ZCD_OFF & _PPS1WAY_OFF & _STVREN_ON & _DEBUG_OFF __config _CONFIG3, _WDTCPS_WDTCPS_11 & _WDTE_OFF & _WDTCWS_WDTCWS_7 & _WDTCCS_LFINTOSC __config _CONFIG4, _WRT_OFF & _SCANE_available & _LVP_OFF __config _CONFIG5, _CP_OFF & _CPD_OFF #ENDCONFIG ;--- Interrupts ---------------------------------------------------------------- include "I:\Project_v2\PBP\PBP_Includes\DT_INTS-14_16F18877.bas" include "I:\Project_v2\PBP\PBP_Includes\ReEnterPBP.bas" ASM INT_LIST macro ; IntSource, Label, Type, ResetFlag? INT_Handler TMR1_INT, _Timer1Interrupt, PBP, yes INT_Handler TMR3_INT, _Timer3Interrupt, PBP, yes endm INT_CREATE ; Creates the interrupt processor INT_ENABLE TMR1_INT ;enables TMR1 interrupts INT_ENABLE TMR3_INT ;enables TMR3 interrupts ENDASM DEFINE OSC 32 define CCP1_REG 0 DEFINE CCP1_BIT 0 define CCP2_REG 0 DEFINE CCP2_BIT 0 DEFINE CCP3_REG 0 DEFINE CCP3_BIT 0 define CCP4_REG 0 DEFINE CCP4_BIT 0 define CCP5_REG 0 ' Must clear unused CCP pins or else unpredictable results DEFINE CCP5_BIT 0 RA4PPS = 0 ' Disable CCP5 RB0PPS = 0 ' Disable CCP4 RB5PPS = 0 ' Disable CCP3 RC1PPS = 0 ' Disable CCP2 RC2PPS = 0 ' Disable CCP1 T1CON = %00110001 ' 1:8 Prescale, Enables Timer1 T3CON = %00110001 ' 1:8 Prescale, Enables Timer3 ' bit 7-6 Unimplemented: Read as ‘0’ ' bit 5-4 CKPS<1:0>: Timer1 Input Clock Prescale Select bits ' ----> 11 = 1:8 Prescale value ' 10 = 1:4 Prescale value ' 01 = 1:2 Prescale value ' 00 = 1:1 Prescale value ' bit 3 Unimplemented: Read as ‘0’ ' bit 2 SYNC: Timer1 Synchronization Control bit ' When TMR1CLK = FOSC or FOSC/4 ' This bit is ignored. The timer uses the internal clock and no ' additional synchronization is performed. ' When TMR1CS<1:0> = (any setting other than FOSC or FOSC/4) ' 1 = Do not synchronize external clock input ' 0 = Synchronized external clock input with system clock ' bit 1 RD16: Timer1 On bit ' 1 = All 16 bits of Timer1 can be read simultaneously (TMR1H is buffered) ' 0 = 16-bit reads of Timer1 are disabled (TMR1H is not buffered) ' bit 0 ON: Timer1 On bit ' ----> 1 = Enables Timer1 ' 0 = Stops Timer1 and clears Timer1 gate flip-flop T1CLK = %00000001 ' FOSC/4 Timer1 Clock T3CLK = %00000001 ' FOSC/4 Timer1 Clock ' bit 7-4 Unimplemented: Read as ‘0’ ' bit 3-0 TxCS<3:0>: Timer1/3/5 Clock Select bits ' 1111 = LC4_out ' 1110 = LC3_out ' 1101 = LC2_out ' 1100 = LC1_out ' 1011 = TMR5 overflow output ' 1010 = TMR3 overflow output ' 1001 = TMR1 overflow output ' 1000 = TMR0 overflow output ' 0111 = CLKR output clock ' 0110 = SOSC ' 0101 = MFINTOSC ' 1.05msec @ 32MHz with no preload ' 0100 = LFINTOSC ' n/a ' 0011 = HFINTOSC ' 16.56msec @ 32MHz with no preload ' 0010 = FOSC ' 16.54msec @ 32MHz with no preload ' ----> 0001 = FOSC/4 ' 66.18msec @ 32MHz with no preload ' 0000 = TxCKIPPS ANSELA = %00000000 ANSELB = %00000000 ANSELC = %00000000 ANSELD = %00000000 ANSELE = %00000000 TRISA = %00000000 TRISB = %00000000 TRISC = %00000000 TRISD = %00000000 TRISE = %00001000 Timer1Ended var byte Timer3Ended var byte Timer3Counter var byte LatB.2 = 0 ' Set Timer1 trace low LatB.0 = 0 ' Set Timer3 trace low LatB.1 = 0 ' Set heartbeat trace low pause 1 goto Start ;--- Interrupts ---------------------------------------------------------------- Timer1Interrupt: T1CON.0 = 0 ' Stops Timer1 Timer1Ended = 1 ' Set flag @ INT_RETURN Timer3Interrupt: T3CON.0 = 0 ' Stops Timer3 Timer3Ended = 1 ' Set flag @ INT_RETURN ;--- Subroutines --------------------------------------------------------------- StartTimer1: @ INT_CLEAR TMR1_INT -- clear flags TMR1H = 62 : TMR1L = 95 ' 50msec interval (32MHz, 16bit, 1:8) T1CON.0 = 1 ' Starts Timer1 Timer1Ended = 0 ' Set flag return StartTimer3: @ INT_CLEAR TMR1_INT -- clear flags TMR3H = 62 : TMR3L = 95 ' 50msec interval (32MHz, 16bit, 1:8) T3CON.0 = 1 ' Starts Timer3 Timer3Ended = 0 ' Set flag return Start: GOSUB StartTimer1 LatB.2 = 1 ' Start Timer1 trace Timer3Counter = 0 GOSUB StartTimer3 LatB.0 = 1 ' Start Timer3 trace Main: LatB.1 = 1 ' Pulse heartbeat IF Timer1Ended = 1 THEN LatB.2 = 0 ' Stop Timer1 trace GOSUB StartTimer1 LatB.2 = 1 ' Start Timer1 trace ENDIF IF Timer3Ended = 1 THEN Timer3Counter = Timer3Counter + 1 if Timer3Counter = 3 then Timer3Counter = 0 LatB.0 = 0 ' Stop Timer3 trace endif GOSUB StartTimer3 LatB.0 = 1 ' Start Timer3 trace ENDIF LatB.1 = 0 ' Reset heartbeat trace GOTO Main end
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