SOLVED: Post #11 - IOC on negative edge sometimes triggers twice on single press

[Demon]

I'm not sure what I'm looking at in the video but inadequate debounce on the input would be my number one guess....

The graphs show the signal at the switch and PIC pins; to confirm the absence of bounce on the signal.

The LCD in the foreground shows the frequencies being swapped back and forth.

... I believe DT_Ints resets the interrupt request flag on exit of ISR (@ INT_RETURN)...

- I changed checking IOCBF.2 to checking Port pin; no change, random double-processing.
- I changed clearing IOCBF.2 = 0 to IOCBF = %00000000; no change, random double-processing.
- I added an IOC counter, Interrupt is definitely entered TWICE when double-processing.

... to test you could insert a simple PAUSE 5 or whatever before exiting.

I'm not sure what this would test. But I still get double-processing with PAUSE 5 in ISR.


I'm definitely missing proper flag reset out of ISR.