DT Ints not working on 16F18426

[Ioannis]

I am also interested in that chip series and would like to know if DT-INTS can finally work on these chips.

Thanks all for the effort,

Ioannis

[wjsmarine]

Hi Richard,

Okay, see below... The Inc file hasn't changed (attached previously).

If you "...i don't use pbp much these days" then I can't thank you enough for continuing to monitor and help us plebs. Sending you some samples is the least I can do.
I'll add a few other new chips in also in the hope they become supported at some stage ('other' compilers support them already...) plus a few others.

Cheers,
Bill

'****************************************************************
'*  Name    : Test_IOCAN.pbp                                    *
'*  Author  : WJS                                               *
'*  Date    : 27/08/2023                                        *
'*  Device  : 16F18426                                          *
'*  Version : 1.0, 391 words using PBP 3.1.5.4                  *
'*  Notes   : Test interrupt code for pushbutton on A.2 pulled  *
'*          : up 10k.                                           *
'****************************************************************
'
' Uses modified DT_INTS-14.bas (v1.10) now renamed DT_INTS-14 v1-2.bas for 16F18426
' - Ints take place but does not appear to return to program (fixed - see below).
'
' INTCON and PIE0 removed per tumbleweed's advice: 
' [www.picbasic.co.uk/forum/showthread.php/26635-DT-Ints-not-working-on-16F18426]
' now working correctly.  See also Test_IOCAN 2 using Richard's ASM (which doesn't work).
 
#CONFIG ; 16F18426
    __config _CONFIG1, _FEXTOSC_OFF & _RSTOSC_HFINT32 & _CLKOUTEN_OFF & _CSWEN_ON & _FCMEN_ON
    __config _CONFIG2, _MCLRE_ON & _PWRTS_PWRT_64 & _LPBOREN_OFF & _BOREN_SBOREN & _BORV_LO & _ZCDDIS_OFF & _PPS1WAY_OFF & _STVREN_ON
    __config _CONFIG3, _WDTCPS_WDTCPS_31 & _WDTE_SWDTEN & _WDTCWS_WDTCWS_7 & _WDTCCS_LFINTOSC
    __config _CONFIG4, _BBSIZE_BB512 & _BBEN_OFF & _SAFEN_OFF & _WRTAPP_OFF & _WRTB_OFF & _WRTC_OFF & _WRTD_OFF & _WRTSAF_OFF & _LVP_OFF
    __config _CONFIG5, _CP_OFF
#ENDCONFIG

' -----[ Initialization 16F18426]--------------------------------------------------------------------------------------- 

    DEFINE  OSC 32              ' Adjust to suit design.

    IOCAF = 0                   ' Clear the Int flag.

;    INTCON = %11000000          ' Enable GIE, PEIE, falling edge.
;See: www.picbasic.co.uk/forum/showthread.php/26635-DT-Ints-not-working-on-16F18426?p=154517#post154517
;It's not a good idea to manipulate the enable bits until everything is setup.
;DT_INTS enables GIE and PEIE right before it exits the INT_CREATE macro.
;If you want to clear the INTEDG bit then just clear that one... INTCON.0 = 0    
    
;    PIE0 = %00010001            ' Enable IOCIE, INTE bits.
    
    IOCAP = 0                   ' Disable IOC rising edge A.
    IOCAN = %00000100           ' Enable IOC falling edge A2.

    ADCON0 = 0                  ' No ADC.
    ANSELA = %00000000          ' All Dig.
    ANSELC = %00000000          ' All Dig.

    CM1CON0 = 0                 ' Comparators off.
    FVRCON = %0                 ' Disabled.

    TRISA = %000100             ' A.2 pulled up, pushbutton to ground.
    TRISC = %000000             ' C.5 serout to PC via 1k, C.4 led to ground via 1k.

LED     var PORTC.4             ' Led via 1k to ground.
To_PC   var PORTC.5             ' Serout to PC at 9600, Inv. Idles low, data goes high.      
serI96  con 16468               ' 9600 Baud Inverted.

    Include "MODEDEFS.BAS"      ' Include Shiftin/out modes.
    INCLUDE "DT_INTS-14 v1-2.bas"   ' New version for Enhanced chips.
    INCLUDE "ReEnterPBP.bas"        ; Include if using PBP interrupts.	

ASM
INT_LIST  macro        ; IntSrce, Label, Type,  ResetFlag?
        INT_Handler    ECIOC_INT,  _PB,   PBP,  yes
    endm
    INT_CREATE               ; Creates the interrupt processor
ENDASM

@ INT_ENABLE ECIOC_INT       ; Enable the Int.

  serout2 to_PC,seri96,[10,13,"I'm Alive!",10,13] ' Confirm.

Begin:
    LED = 1     ' On.
    pause 500   ' 2hz.
    LED = 0     ' Off.
    pause 500   ' 2hz.
    goto begin  ' Cycle.


'---[IOC - interrupt handler]---------------------------------------------------
PB: ' Pushbutton to get here.
 if IOCAF.2 = 1 then        ' Bit 1 (A.2) set.
  serout2 to_PC,seri96,[10,13,"Int!",10,13] ' Testing.
 endif 

  IOCAF = 0                 ' Clear the Int flag.

@ INT_RETURN
  

end

[tumbleweed]

Glad it's working. If you run across anything funny let us know.

There are a few bytes of ram reserved by DT_INTS for things that aren't needed, so they could be gotten rid of too but it's not hurting anything.

I'll add a few other new chips in also in the hope they become supported at some stage

As long as the chip is supported by mpasmx 5.87 then you've got a shot at it. That's basically any device that has an existing file in the DEVICES folder,
with the exception of the 18FxxQ84. That one is listed as supported by mpasmx but it doesn't work (that's an mpasmx fault, not pbp).

Anything past that and I don't think you'll see it get added... mpasmx is at the end of its life unless it's extended like the Swordfish folks have done for the 18F series.

I wouldn't trust proteus simulations to get it right, especially with these new chips.

[richard]

Bit the bullet and fished out an old 16f18875 from curiosity hpc board,
code works fine. seems proteus fails to emulate that chip properly
looks very much like the switch release triggers another interrupt that is not easily serviceable

[amgen]

One important thing I learned from my EET courses years ago ..... circuits have 2 responses to a change in voltage/current. There is an initial response that relates mostly to inductance and capacitance and previous state of circuit, then there is the 'steady state response' that comes after the circuit settles to constant state (micro/milli seconds later). That is not exactly referring to switch/contact bounce, but the interrupt could be triggered/cleared many times from contact bounce unless there is some kind of circuit that debounces the mechanical switch. One kind of test could be done is have the interrupt count/display how many times it gets triggered from a switch press.

[richard]

do simulated switches bounce in a simulated circuit simulation?
do androids dream of electric sheep ?
so many unknowns

[amgen]

do simulated switches bounce in a simulated circuit simulation?

I would suppose that there are good simulations and faulty simulations