TMR1 - strange behaviour when toggeling a BIT variable on overflow

[richard]

if you use a chip with clc module you can blink a led with no code at all
its all in hardware once configured

'****************************************************************
'*  Name    : hw-blinky.BAS                                     *
'*  Author  : richard                                           *
'*  Notice  : Copyright (c) 2023 caveat emptor                  *
'*          : All Rights Reserved                               *
'*  Date    : 18/05/2023                                        *
'*  Version : 1.0                                               *
'*  Notes   : pic16f18875@4mhz                                  *
'*          : led portb.0 blink @1hz                            *
'****************************************************************
#CONFIG
    __config _CONFIG1, _FEXTOSC_OFF & _RSTOSC_HFINT1 & _CLKOUTEN_OFF & _CSWEN_ON & _FCMEN_ON
    __config _CONFIG2, _MCLRE_ON & _PWRTE_OFF & _LPBOREN_OFF & _BOREN_ON & _BORV_LO & _ZCD_OFF & _PPS1WAY_OFF & _STVREN_ON & _DEBUG_OFF
    __config _CONFIG3, _WDTCPS_WDTCPS_11 & _WDTE_ON & _WDTCWS_WDTCWS_7 & _WDTCCS_LFINTOSC
    __config _CONFIG4, _WRT_OFF &   _LVP_OFF
    __config _CONFIG5, _CP_OFF & _CPD_OFF


#ENDCONFIG   
    ANSELB = 0   
    trisb=$fe  'led var portb.0
    OSCCON1 = $60 
    OSCCON3 =  0 
    OSCEN =  0
    OSCFRQ =  2
    OSCTUNE =  0
    
'led var portb.0
gosub   set_blinky
 
 
  
loopy:
; look no hands
goto loopy 
 
 
 
end   
   
set_blinky:   
    ;// Set the CLC1 to the options selected in the User Interface
    ;// LC1G1POL not_inverted; LC1G2POL inverted; LC1G3POL not_inverted; LC1G4POL not_inverted; LC1POL not_inverted; 
    CLC1POL = $02;
    ;// LC1D1S T1_overflow; 
    CLC1SEL0 = $0B;
    ;// LC1D2S CLC1_OUT; 
    CLC1SEL1 = $20;
    ;// LC1D3S CLC1_OUT; 
    CLC1SEL2 = $20;
    ;// LC1D4S CLC1_OUT; 
    CLC1SEL3 = $20;
    ;// LC1G1D3N disabled; LC1G1D2N disabled; LC1G1D4N disabled; LC1G1D1T enabled; LC1G1D3T disabled; LC1G1D2T disabled; LC1G1D4T disabled; LC1G1D1N disabled; 
    CLC1GLS0 = $02;
    ;// LC1G2D2N disabled; LC1G2D1N disabled; LC1G2D4N disabled; LC1G2D3N disabled; LC1G2D2T enabled; LC1G2D1T disabled; LC1G2D4T disabled; LC1G2D3T disabled; 
    CLC1GLS1 = $08;
    ;// LC1G3D1N disabled; LC1G3D2N disabled; LC1G3D3N disabled; LC1G3D4N disabled; LC1G3D1T disabled; LC1G3D2T disabled; LC1G3D3T disabled; LC1G3D4T disabled; 
    CLC1GLS2 = $00;
    ;// LC1G4D1N disabled; LC1G4D2N disabled; LC1G4D3N disabled; LC1G4D4N disabled; LC1G4D1T disabled; LC1G4D2T disabled; LC1G4D3T disabled; LC1G4D4T disabled; 
    CLC1GLS3 = $00;
    ;// LC1EN enabled; INTN disabled; INTP disabled; MODE 1-input D flip-flop with S and R; 
    CLC1CON = $84;
    
    ;// Set the CLC3 to the options selected in the User Interface
    ;// LC3G1POL not_inverted; LC3G2POL inverted; LC3G3POL not_inverted; LC3G4POL not_inverted; LC3POL not_inverted; 
    CLC3POL = $02;
    ;// LC3D1S CLC1_OUT; 
    CLC3SEL0 = $20;
    ;// LC3D2S CLC3_OUT; 
    CLC3SEL1 = $22;
    ;// LC3D3S CLC3_OUT; 
    CLC3SEL2 = $22;
    ;// LC3D4S CLC3_OUT; 
    CLC3SEL3 = $22;
    ;// LC3G1D3N disabled; LC3G1D2N disabled; LC3G1D4N disabled; LC3G1D1T enabled; LC3G1D3T disabled; LC3G1D2T disabled; LC3G1D4T disabled; LC3G1D1N disabled; 
    CLC3GLS0 = $02;
    ;// LC3G2D2N disabled; LC3G2D1N disabled; LC3G2D4N disabled; LC3G2D3N disabled; LC3G2D2T enabled; LC3G2D1T disabled; LC3G2D4T disabled; LC3G2D3T disabled; 
    CLC3GLS1 = $08;
    ;// LC3G3D1N disabled; LC3G3D2N disabled; LC3G3D3N disabled; LC3G3D4N disabled; LC3G3D1T disabled; LC3G3D2T disabled; LC3G3D3T disabled; LC3G3D4T disabled; 
    CLC3GLS2 = $00;
    ;// LC3G4D1N disabled; LC3G4D2N disabled; LC3G4D3N disabled; LC3G4D4N disabled; LC3G4D1T disabled; LC3G4D2T disabled; LC3G4D3T disabled; LC3G4D4T disabled; 
    CLC3GLS3 = $00;
    ;// LC3EN enabled; INTN disabled; INTP disabled; MODE 1-input D flip-flop with S and R; 
    CLC3CON = $84;
    
    RB0PPS = $03;   //RB0->CLC3:CLC3OUT; 
    T1CLK = 1
    T1CON = $31; 
return