Speed optimization (framebuffer scrolling)

[richard]

try some asm

untested but should be close
bcnt var byte bank 1
dcnt var byte bank 1
dspbuff var byte[380] ;36 displays + 2 outside of display * 10

rotate_r:  ' pic18
asm
    banksel _bcnt    ;ROW
    movlw   10       ;10 rows  
    movwf   _bcnt
    clrf    FSR0H
    movlw   low  (_dspbuff)
    movwf   FSR0L
    movlw   111        ;BUFFER SIZE low byte  (380-1) 36 displays + 2 outside of display * 10-1
    ADDWF   FSR0L,F
    movlw   high (_dspbuff)
    ADDWFC   FSR0H
    movlw   1        ;BUFFER SIZE high byte  (380)
    ADDWF   FSR0H
    banksel _bcnt     ;note place bcnt and dcnt in same bank
    MOVLW 38     ;36 displays + 2 outside of display  
NROW       
    movwf   _dcnt
    bcf    STATUS, C
Ncol
    rrcf   POSTDEC0 ,f     ;PER COLUMN
    DECFSZ  _dcnt ,F
    BRA    Ncol
    BNC    NBNC
    bsf    PLUSW0,7     ;max displays would be 127 to use plusw
NBNC 
    DECFSZ  _bcnt ,F
    BRA    NROW
    banksel 0
endasm

this is my 4 panel code for reference

rotate: ;pic18
asm
    banksel _bcnt    ;ROW
    movlw   8
    movwf   _bcnt
    clrf    FSR0H
    movlw   low  (_dspbuff)
    movwf   FSR0L
    movlw   31        ;BUFFER SIZE
    ADDWF   FSR0L,F
    movlw   high (_dspbuff)
    ADDWFC   FSR0H
    banksel _bcnt
    MOVLW 4
NROW     
    bcf    STATUS, C
    rrcf   POSTDEC0 ,f     ;PER COLUMN
    rrcf   POSTDEC0 ,f     ;PER COLUMN
    rrcf   POSTDEC0 ,f     ;PER COLUMN
    rrcf   POSTDEC0 ,f     ;PER COLUMN
    BNC    NBNC
    bsf    PLUSW0,7
NBNC 
    DECFSZ  _bcnt ,F
    BRA    NROW
endasm

[HenrikOlsson]

Richard, thank you. My problem is I suck as ASM and I don't understand half of what's going on there. It might very well work, in which case I'd be lucky but if it doesn't or I need to modify it I basically have no idea what I'm doing. I should use it as a learning exercise though as I do feel the need to better understand ASM.

tumblweed, wow, that was an easy yet effective modification (and it works perfectly fine) - just what I was hoping for.
Went down from 7.6ms to just above 3ms for a 81 matrix wide display. More than double the speed, cool!

One thing threw me off on a tangent for a while...

OFFSET_INCR CON NumberOfDisplays + 2

Since NumberOfDisplays is already a CONstant (with the value 81 in this particular case) I replaced

Offset = Offset + OFFSET_INCR

with

Offset = Offset + NumberOfDisplays + 2

expecting the compiler to replace both versions to

Offset = Offset + 83

It did not...your version with, the constant defined executes at 3.03ms, the other one in 3.45ms

I took 15 minutes for the penny to drop and now I need to go thru my code and see where else I've made that silly mistake.

Thanks again, both of you guys!

/Henrik.

[richard]

I should use it as a learning exercise though as I do feel the need to better understand ASM.

its worth the effort

this just under 100uS for a iteration

'****************************************************************
'*  Name    : UNTITLED.BAS                                      *
'*  Author  : richard                                           *
'*  Notice  : Copyright (c) 2022 caveat emptor                  *
'*          : All Rights Reserved                               *
'*  Date    : 11/10/2022                                        *
'*  Version : 1.0                                               *
'*  Notes   :                                                   *
'*          :                                                   *
'****************************************************************
#CONFIG
  CONFIG  FOSC = INTIO67
  CONFIG  PLLCFG = ON
  CONFIG  PRICLKEN = ON
  CONFIG  FCMEN = OFF
  CONFIG  IESO = OFF
  CONFIG  PWRTEN = ON
  CONFIG  BOREN = SBORDIS
  CONFIG  BORV = 190
  CONFIG  WDTEN = OFF
  CONFIG  WDTPS = 32768
  CONFIG  CCP2MX = PORTC1
  CONFIG  PBADEN = OFF
  CONFIG  CCP3MX = PORTB5
  CONFIG  T3CMX = PORTC0
  CONFIG  HFOFST = ON
  CONFIG  P2BMX = PORTB5
  CONFIG  MCLRE = EXTMCLR
  CONFIG  STVREN = ON
  CONFIG  LVP = OFF
  CONFIG  XINST = OFF
  CONFIG  DEBUG = OFF
  CONFIG  CP0 = OFF
  CONFIG  CP1 = OFF
  CONFIG  CP2 = OFF
  CONFIG  CP3 = OFF
  CONFIG  CPB = OFF
  CONFIG  CPD = OFF
  CONFIG  WRT0 = OFF
  CONFIG  WRT1 = OFF
  CONFIG  WRT2 = OFF
  CONFIG  WRT3 = OFF
  CONFIG  WRTC = OFF
  CONFIG  WRTB = OFF
  CONFIG  WRTD = OFF
  CONFIG  EBTR0 = OFF
  CONFIG  EBTR1 = OFF
  CONFIG  EBTR2 = OFF
  CONFIG  EBTR3 = OFF
  CONFIG  EBTRB = OFF
#ENDCONFIG
    




    DEFINE OSC 64
    DEFINE DEBUG_REG PORTB
    DEFINE DEBUG_BIT 7
    DEFINE DEBUG_BAUD 9600
    DEFINE DEBUG_MODE 0
    LATB.7=1
    bcnt       VAR BYTE   bank0
    dcnt       VAR BYTE   bank0
    BUFF       VAR BYTE[32]
    iteration  VAR word 
    OSCCON=$70
    OSCTUNE.6=1
    while ! osccon2.7 :WEND    ;wait for pll
    ANSELB=0
    ANSELC=0
    ANSELA=0 
    dspbuff var byte[380]
    clear
    trisc = %01111111 
    TRISB = %01111111
    TRISA = %11111111
    pause 1000
    debug 13,10,"ready",13,10
     LATc.7=0
     ;38x8 bits wide 10 bits high
     dspbuff[379]=$c0
     dspbuff[37]=$c0
main:
LATc.7=1; trigger oscilloscope
gosub rotate_r    
LATc.7=0
debug 13,10,dec iteration
debug 13,10,bin8 dspbuff[379]," " ,bin8 dspbuff[378]," " ,bin8 dspbuff[343] ," ",bin8 dspbuff[342] 
debug 13,10,bin8 dspbuff[37] ," " ,bin8 dspbuff[36] ," " ,bin8 dspbuff[1]   ," ",bin8 dspbuff[0] 
pause 200
iteration=iteration+1    
goto main    
    
    
    
    
rotate_r:  ' pic18    100uS
asm
    banksel _bcnt    ;ROW
    movlw   10       ;10 rows  
    movwf   _bcnt
    movlw   high (_dspbuff)
    movwf   FSR0H    
    movlw   low  (_dspbuff)
    movwf   FSR0L
    movlw   123        ;BUFFER SIZE low byte  (380-1) 36 displays + 2 outside of display * 10-1
    ADDWF   FSR0L 
    movlw   1        ;BUFFER SIZE high byte  (380)
    ADDWFC   FSR0H
    MOVLW 38     ;36 displays + 2 outside of display 
NROW  
    movwf   _dcnt
    bcf    STATUS, C
Ncol
    rrcf   POSTDEC0 ,f     ;PER COLUMN
    DECFSZ  _dcnt ,F
    BRA    Ncol
    BNC    NBNC
    bsf    PLUSW0,7     ;max displays would be 127 to use plusw
NBNC 
    DECFSZ  _bcnt ,F
    BRA    NROW
    banksel 0
    return
endasm

[HenrikOlsson]

Thanks Richard,
What device did you run this on?
After being unseccessfull in integrating your version into my code I tried to get your code (I removed some oscillator specific stuff to match my device) to compile for the 57Q43 but it won't.
It can't fit bcnt/dcnt into bank 0 so I tried various banks. Bank 5 works but I still get [ASM WARNING: ASM-SCROLL.ASM (411) : Invalid RAM location specified]

Line 411 in the .asm listing is banksel 0 in the NBNC routine.

I know it says warning and not error but the description sounds bad enough :-)

See, this is what I mean....

For reference, here's what I'm trying to compile for the 57Q43:

DEFINE OSC 64
DEFINE DEBUG_REG PORTB
DEFINE DEBUG_BIT 7
DEFINE DEBUG_BAUD 9600
DEFINE DEBUG_MODE 0

LATB.7=1

bcnt       VAR BYTE   bank0
dcnt       VAR BYTE   bank0
iteration  VAR word 

ANSELB=0
ANSELC=0
ANSELA=0 
dspbuff var byte[380]
clear
trisc = %01111111 
TRISB = %01111111
TRISA = %11111111
pause 1000
debug 13,10,"ready",13,10
 LATc.7=0
 ;38x8 bits wide 10 bits high
 dspbuff[379]=$c0
 dspbuff[37]=$c0


main:
LATc.7=1; trigger oscilloscope
gosub rotate_r    
LATc.7=0
debug 13,10,dec iteration
debug 13,10,bin8 dspbuff[379]," " ,bin8 dspbuff[378]," " ,bin8 dspbuff[343] ," ",bin8 dspbuff[342] 
debug 13,10,bin8 dspbuff[37] ," " ,bin8 dspbuff[36] ," " ,bin8 dspbuff[1]   ," ",bin8 dspbuff[0] 
pause 200
iteration=iteration+1    
goto main    
    
    
rotate_r:  ' pic18    100uS
asm
    banksel _bcnt    ;ROW
    movlw   10       ;10 rows  
    movwf   _bcnt
    movlw   high (_dspbuff)
    movwf   FSR0H    
    movlw   low  (_dspbuff)
    movwf   FSR0L
    movlw   123        ;BUFFER SIZE low byte  (380-1) 36 displays + 2 outside of display * 10-1
    ADDWF   FSR0L 
    movlw   1        ;BUFFER SIZE high byte  (380)
    ADDWFC   FSR0H
    MOVLW 38     ;36 displays + 2 outside of display 
NROW  
    movwf   _dcnt
    bcf    STATUS, C
Ncol
    rrcf   POSTDEC0 ,f     ;PER COLUMN
    DECFSZ  _dcnt ,F
    BRA    Ncol
    BNC    NBNC
    bsf    PLUSW0,7     ;max displays would be 127 to use plusw
NBNC 
    DECFSZ  _bcnt ,F
    BRA    NROW
    banksel 0
    return
endasm

[richard]

18f26k22

i have not tried much with Q43 yet , but
they have no ram below bank 5.
i dont know what bank pbp defaults to for them bank0 makes no sense at all , before them pbp kinda assumes bank0 before and after calls.
the instruction set is slightly different. movfffl or whatever
there may be other weird shit with indirect addressing

i have some q43's i just lack the enthusiasm to learn about them when the tried and trusty k22 serves my needs

[richard]

try them in bank6
and just remove the banksel 0 at the end


i added a rotate left to and a few tweaks

'****************************************************************'*  Name    : UNTITLED.BAS                                      *
'*  Author  : richard                                           *
'*  Notice  : Copyright (c) 2022 caveat emptor                  *
'*          : All Rights Reserved                               *
'*  Date    : 11/10/2022                                        *
'*  Version : 1.0                                               *
'*  Notes   :                                                   *
'*          : pic18f26k22                                                  *
'****************************************************************
#CONFIG
  CONFIG  FOSC = INTIO67
  CONFIG  PLLCFG = ON
  CONFIG  PRICLKEN = ON
  CONFIG  FCMEN = OFF
  CONFIG  IESO = OFF
  CONFIG  PWRTEN = ON
  CONFIG  BOREN = SBORDIS
  CONFIG  BORV = 190
  CONFIG  WDTEN = OFF
  CONFIG  WDTPS = 32768
  CONFIG  CCP2MX = PORTC1
  CONFIG  PBADEN = OFF
  CONFIG  CCP3MX = PORTB5
  CONFIG  T3CMX = PORTC0
  CONFIG  HFOFST = ON
  CONFIG  P2BMX = PORTB5
  CONFIG  MCLRE = EXTMCLR
  CONFIG  STVREN = ON
  CONFIG  LVP = OFF
  CONFIG  XINST = OFF
  CONFIG  DEBUG = OFF
  CONFIG  CP0 = OFF
  CONFIG  CP1 = OFF
  CONFIG  CP2 = OFF
  CONFIG  CP3 = OFF
  CONFIG  CPB = OFF
  CONFIG  CPD = OFF
  CONFIG  WRT0 = OFF
  CONFIG  WRT1 = OFF
  CONFIG  WRT2 = OFF
  CONFIG  WRT3 = OFF
  CONFIG  WRTC = OFF
  CONFIG  WRTB = OFF
  CONFIG  WRTD = OFF
  CONFIG  EBTR0 = OFF
  CONFIG  EBTR1 = OFF
  CONFIG  EBTR2 = OFF
  CONFIG  EBTR3 = OFF
  CONFIG  EBTRB = OFF
#ENDCONFIG
    


    NumberOfDisplays  CON 36
    NumberOfRows  CON 10
    DEFINE OSC 64
    DEFINE DEBUG_REG PORTB
    DEFINE DEBUG_BIT 7
    DEFINE DEBUG_BAUD 9600
    DEFINE DEBUG_MODE 0
    LATB.7=1
    bcnt       VAR BYTE   bank0
    dcnt       VAR BYTE   bank0
    BUFF       VAR BYTE[32]
    iteration  VAR word 
    OSCCON=$70
    OSCTUNE.6=1
    while ! osccon2.7 :WEND    ;wait for pll
    ANSELB=0
    ANSELC=0
    ANSELA=0 
    dspbuff var byte[380]
    clear
    trisc = %01111111 
    TRISB = %01111111
    TRISA = %11111111
    pause 1000
    debug 13,10,"ready",13,10
    LATc.7=0
    ;38x8 bits wide 10 bits high


main:
    iteration=0
    dspbuff[379]=3
    dspbuff[37]=3
    WHILE  iteration<610
        LATc.7=1
        gosub rotate_l
        LATc.7=0
        debug 13,10,dec iteration
        debug 13,10,bin8 dspbuff[379]," " ,bin8 dspbuff[378]," " ,bin8 dspbuff[343] ," ",bin8 dspbuff[342] 
        debug 13,10,bin8 dspbuff[37] ," " ,bin8 dspbuff[36] ," " ,bin8 dspbuff[1]   ," ",bin8 dspbuff[0] 
        pause 50
        iteration=iteration+1 
    WEND
    iteration=0
    dspbuff[379]=$c0
    dspbuff[37]=$c0
    WHILE  iteration<610
        LATc.7=1
        gosub rotate_R
        LATc.7=0
        debug 13,10,dec iteration
        debug 13,10,bin8 dspbuff[379]," " ,bin8 dspbuff[378]," " ,bin8 dspbuff[343] ," ",bin8 dspbuff[342] 
        debug 13,10,bin8 dspbuff[37] ," " ,bin8 dspbuff[36] ," " ,bin8 dspbuff[1]   ," ",bin8 dspbuff[0] 
        pause 50
        iteration=iteration+1 
    WEND
goto main    
    
    
    
    
rotate_r:  ' pic18
asm
    banksel _bcnt  ;ROW
    movlw   _NumberOfRows    ;10 rows  
    movwf   _bcnt
    movlw   high (_dspbuff)  ;BOTTOM OF BUFFER
    movwf   FSR0H    
    movlw   low  (_dspbuff)
    movwf   FSR0L
    movlw   low((_NumberOfDisplays + 2)*_NumberOfRows-1) ;TOP OF BUFFER
    ADDWF   FSR0L 
    movlw   high((_NumberOfDisplays + 2)*_NumberOfRows-1)    
    ADDWFC  FSR0H
    MOVLW   _NumberOfDisplays + 2;36 displays + 2 outside of display 
RROW  
    movwf   _dcnt        ;display
    bcf     STATUS, C
Rcol
    rrcf    POSTDEC0 ,f  ;PER display
    DECFSZ  _dcnt ,F
    BRA     Rcol
    BNC     RBNC
    bsf     PLUSW0,7     ;max displays would be 127 to use plusw
RBNC 
    DECFSZ  _bcnt ,F
    BRA     RROW
    banksel 0
    return
endasm
 rotate_l:  ' pic18
asm
    banksel _bcnt              ;ROW
    movlw   _NumberOfRows 
    movwf   _bcnt
    movlw   high (_dspbuff)    ;BOTTOM OF BUFFER
    movwf   FSR0H    
    movlw   low  (_dspbuff)
    movwf   FSR0L
LROW
    MOVLW   _NumberOfDisplays + 2;36 displays + 2 outside of display 
    movwf   _dcnt         ;display
    comf    WREG
    incf    WREG
    bcf     STATUS, C
Lcol
    rlcf    POSTINC0 ,f   ;PER display
    DECFSZ  _dcnt ,F
    BRA     Lcol
    BNC     LBNC
    bsf     PLUSW0,0       ;max displays would be 127 to use plusw
LBNC 
    DECFSZ  _bcnt ,F
    BRA     LROW
    banksel 0
    return
endasm

[richard]

with my suggestions it compiles for 18f47q43, whether it works is not tested . a quick browse of the q43 instruction set and access bank looks ok