PIC18FxxQ43 Version of DT_INTS

[tumbleweed]

In your main file you need to uncomment the 'define use_lowpriority' and rearrange the DT-INTS setup section.

Try:

   ' ---------- Set up DT_INTS-18 Routine for Instant Interrupt handling   -----------
   DEFINE USE_LOWPRIORITY  1   ' Include if using Low Pr. PBP INTS
 
   ' ****** include Placed here becuase of pin varables and routine varable needed to be set first  *******  
   INCLUDE "DT_INTS-18_Q43.bas"                  ; Base Interrupt System for 18FxxQ43 processors  ( DT_INTS-18_3_42.BAS)
   INCLUDE "ReEnterPBP-18.bas"                   ; Include if using PBP interrupts
   INCLUDE "ReEnterPBP-18LP.bas"                 ; Include if using Low Priority PBP INTS
 '------------------------------------------------------------------------------

  INCLUDE "modedefs.bas"                        ' Required for shiftout,shiftin commands as defined symbols

 ;----[High Priority Interrupts]-----------------------------------------------
ASM
INT_LIST macro	; IntSource,         Label, Type, ResetFlag?
   INT_Handler TMR1_INT, _EL_ClockCount,PBP,yes      ; Call ClockCount  subroutine in K9_Elapsed_INT-18.bas
;   INT_Handler TMR3_INT, _Show_Display, PBP,yes      ; Call Display Show for LED Modules in   
;   INT_Handler TMR2_INT, _Bright_Ctrl,  PBP,yes      ; call Brightness Control for display module 
 endm
 INT_CREATE				; Creates the High Priority interrupt processor
 
;----[Low Priority Interrupts]------------------------------------------------
INT_LIST_L  macro  ; IntSource,        Label,  Type, ResetFlag?
   INT_Handler TMR0_INT, _Timer0_Count, PBP,yes      ; call Timer0_Count subroutine
;   INT_Handler  IOC_INT, _Rx_mode_IOC,  PBP,yes      ; Call Rx_mode_IOC subroutine for RF RX_mode
;   INT_Handler  U2_INT,  _Term_RX,      PBP,yes      ; Q43 - Call Term_input for terminal char buffer  
  ; INT_Handler  RX2_INT, _Term_RX,      PBP,yes      ; K40 - Call Term_input for terminal char buffer  
 endm
 INT_CREATE_L                            ; Creates the Low Priority interrupt processor
ENDASM

[longpole001]

sorry tubbleweed for the confusion ,
i had uncommented all the low priority commands required and tested for the failure

but then re removed the low priority for checking it worked , then sent the files ,

put it down to being 1AM when i was doing the changes

here is the files with the low priority commands in place and the files results

cheers


sheldon

[tumbleweed]

From what I can tell the basic interrupt structure looks to be ok.
Unfortunately, the way the various files are written, all of the ReEnterPBP routines don't appear in the .lst files, so it makes tracking what they're doing next to impossible.

When you have ReEnterPBP-18 and ReEnterPBP-18LP together they use a boatload of ram, over 136 bytes for the PBP context.
That puts many of the variables outside the access bank, so it's possible there's a bank select issue in there somewhere.

[longpole001]

i am finding some other issues with bank access with other asm code i have , that is not happy on q43

thinking that what you did with
-----------
movf BSR, 0
banksel INT_Priority_Reg
bsf INT_Priority_Reg, INT_Priority_Bit
movwf BSR
-----------

historic code i use for elasped timer to get the cycles constant and limited may now work against q43 chip ??

i may be wrong as my asm really sucks but each command that has BCF will need a banksel , bsf ????

having trouble with load of timer1 using asm on the q43

but doing that change would add cycles i am sure

i hope i am wrong

 ASM
                                 ; 16.368mhz tcxo = 61.0948ns clock       16.00Mhz = 62.5 ( internal osc used currenlty 20/2/20)
TimerConst = 40912               ; 40912 + 8 cycle instrution load = 40920 x 61.0948ns = 2.499999216mS  timer 1 clock tick   (  16mhz int = 39992 + 8cycle = 40000 x 62.5ns = 2.5ms) 
TimerConst = 65536 - TimerConst  ; set value for timer1 preload
                                                           
;-----------------  ADD TimerConst to TMR1H:TMR1L -------------------------
ADD2_TIMER   macro
     BCF     T1CON,TMR1ON, 0       ;  1 Turn off timer
     MOVLW   LOW(TimerConst)       ;  1
     ADDWF   TMR1L,F, 0            ;  1    
     BTFSC   STATUS,C              ;  1/2
     INCF    TMR1H,F, 0            ;  1
     MOVLW   HIGH(TimerConst)      ;  1
     ADDWF   TMR1H,F, 0            ;  1
     endm

; -----------------  ADD TimerConst to TMR1H:TMR1L and restart TIMER1 ------
RELOAD_TIMER  macro
     ADD2_TIMER
     BSF     T1CON,TMR1ON, 0       ;  1   Turn TIMER1 back on  (8 cycles)
     endm

; -----------------  Load TimerConst into TMR1H:TMR1L ----------------------
LOAD_TIMER  macro
     MOVE?CT  0, T1CON,TMR1ON
     MOVE?CB  0, TMR1L
     MOVE?CB  0, TMR1H
     ADD2_TIMER
     endm
 ENDASM

[tumbleweed]

On the Q43 (and most recent PIC18's with the VIC), the SFR registers have been moved down in memory starting at BANK 0,
so general purpose RAM no longer starts there. The access bank used to be part of that, but no more.

For the Q43, the access RAM is now at 0x500-0x55F, and the SFR access bank is 0x460-0x4FF.
Anything located outside those addresses require the bank select register (BSR) to be set appropriately.

Many asm instructions have a ", a" field at the end, where 'a' specifies the RAM access bit:
a = 0: RAM location in Access RAM (BSR register is ignored)
a = 1: RAM bank is specified by BSR register

The TMR1 registers are located in bank 3, so you can't use asm instructions that end in ", 0" to access them.
You'd have to set the BSR with a 'movlb' (or use mpasm 'BANKSEL reg') and change the ", 0" to ", 1" (or drop it off).
If you don't specify the ", a" part MPASM is usually pretty good at figuring out when it needs a = ", 0", or ", 1", but it's up to you to set the BSR if needed.

Datasheet sections 44 (Instruction Set Summary) and section 46 (Register Summary) have all the info you need, once you get your head wrapped around how it works.


So, looking at your timer macros LOAD_TIMER is probably ok since the 'MOVE?xx' macros set the BSR, but if the other two are used on their own they'll need to change (adding instructions which will change the timing).

[longpole001]

ok tubleweed ,

will try some add in commands for timer 1

hope you shine a light on the low priority ints problem

cheers

sheldon

[longpole001]

Hi guys

is there any further tests i can do to help solve the low priory ints problem on the q43 chip

cheers

sheldon

[tumbleweed]

Not really that I can think of.

I thought I'd try and load it into MPLABX so I could debug it, but it's been so long since I've used it w/PBP I can't seem to get the two so I can build and debug in MPLABX.
Using MPLABX 5.35 w/ PBP 3.1.4, a simple blinky program builds ok with the commandline, but even though it builds in MPLABX it fails the MPLABX make process so it won't load it.

I don't remember what makes the two happy...