I don't see anything wrong with ReEnterPBP-18LP.bas, but there are a few other things I noticed.

First off, as I said, you can't have just a low-priority interrupt.
If you don't define a high-priority one then INTCON0.GIE never gets set, and if GIE is 0 then you get no interrupts period.
If you only have one interrupt it must be high-priority.

Next, there's an issue with the INT_ENABLE macro.
The lines that setup the priority bits in the IRPx registers assume that the registers are in the access bank, and they're not.
Code:
if (Priority == H)
    bsf  INT_Priority_Reg, INT_Priority_Bit, 0
else
    if (Priority == L)
        bcf  INT_Priority_Reg, INT_Priority_Bit, 0
The ", 0" at the end of those lines tell the assembler to use the access bank instead of the BSR bank select register.
In the Q43, the IRP registers are in bank 3, so they can't use the SFR access bank (bank 4).
Those instructions need a BANKSEL before them, remove the ", 0", and don't forget to put the BSR register back afterwards.
Something like this ought to work...
Code:
if (INT_Priority_Reg != -1)
    if (Priority == H)
        movf BSR, 0			; save current BSR in WREG
	banksel INT_Priority_Reg 
        bsf  INT_Priority_Reg, INT_Priority_Bit
        movwf BSR           ; restore BSR
    else
        if (Priority == L)
	    movf BSR, 0			; save current BSR in WREG
            banksel INT_Priority_Reg 
	    bcf  INT_Priority_Reg, INT_Priority_Bit
            movwf BSR           ; restore BSR
	else
            error "INT_ENABLE - Invalid Priority Specified"
        endif
    endif
else

Finally, in the INT_CREATE_H macro, the line following OverCREATE comments out PEIE... that should be uncommented.
Otherwise, if you're not using priorities you'll never get a peripheral interrupt.
Code:
OverCREATE
    bsf   INTCON0,GIE, 0             ; Enable High Priority Interrupts
;    bsf   INTCON0,PEIE, 0            ; Enable Peripheral Interrupts
  endm
should be:
Code:
OverCREATE
    bsf   INTCON0,GIE, 0             ; Enable High Priority Interrupts
    bsf   INTCON0,PEIE, 0            ; Enable Peripheral Interrupts
  endm