The datasheet mentions that when the data pin goes to 1, when can start reading the 24 bit
the opposite in fact

data sheet
Serial Interface
Pin PD_SCK and DOUT are used for data
retrieval, input selection, gain selection and power
down controls.
When output data is not ready for retrieval,
digital output pin DOUT is high. Serial clock
input PD_SCK should be low. When DOUT goes
to low, it indicates data is ready for retrieval. By
applying 25~27 positive clock pulses at the
PD_SCK pin, data is shifted out from the DOUT
output pin. Each PD_SCK pulse shifts out one bit,
starting with the MSB bit first, until all 24 bits are
shifted out. The 25th pulse at PD_SCK input will
pull DOUT pin back to high (Fig.2).
Input and gain selection is controlled by the
number of the input PD_SCK pulses (Table 3).
PD_SCK clock pulses should not be less than 25
or more than 27 within one conversion period, to
avoid causing serial communication error.
Issue 1 : Why use 15 loop when the datasheet mentions 24 bits are to be read ??
good question , its not in keeping with the spirit of the data sheet , but obviously the intent is to keep only
the 15 or 16 high order bits and tolerate the lower resolution so incurred

Issue 2 : Why start the shifting immediately, shouldn't the data be fetch first, then do the shifting ?
no its read in msb first, the msb will be positioned correctly at the end of the sequence


my code maintains the maximum resolution that can be adequately managed by pbp and fully completes the read cycle
that allows the chip gain and analog channel to be managed