4 Wire SPI with Shiftin/Shiftout ?


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  1. #1
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    Default Re: 4 Wire SPI with Shiftin/Shiftout ?

    Yes, I tried with mode 5 and it does not works, it also does not works with mode 4 or others.
    MSSP or whatever it is, might be good, but are there direct support statements in PBP ?
    And also, I already have pre-wired devices and they're meant to be in that way.

    The code below does not works - it returns all 255.

    Code:
    ;----[16F886 Hardware Configuration]--------------------------------------------
    #CONFIG
    cfg1 = _INTRC_OSC_NOCLKOUT    ; INTOSCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN
    cfg1&= _WDT_ON                ; WDT enabled
    cfg1&= _PWRTE_OFF             ; PWRT disabled
    cfg1&= _MCLRE_OFF             ; RE3/MCLR pin function is digital input, MCLR internally tied to VDD
    cfg1&= _CP_OFF                ; Program memory code protection is disabled
    cfg1&= _CPD_OFF               ; Data memory code protection is disabled
    cfg1&= _BOR_OFF               ; BOR disabled
    cfg1&= _IESO_ON               ; Internal/External Switchover mode is enabled
    cfg1&= _FCMEN_ON              ; Fail-Safe Clock Monitor is enabled
    cfg1&= _LVP_OFF               ; RB3 pin has digital I/O, HV on MCLR must be used for programming
    cfg1&= _DEBUG_OFF             ; In-Circuit Debugger disabled, RB6/ICSPCLK and RB7/ICSPDAT are general purpose I/O pins
      __CONFIG _CONFIG1, cfg1
    
    
    cfg2 = _BOR40V                ; Brown-out Reset set to 4.0V
    cfg2&= _WRT_OFF               ; Write protection off
      __CONFIG _CONFIG2, cfg2
    
    
    #ENDCONFIG
    
    
    
    
    'chip configs
    TRISA=%01000000  'SET A TO OUTPUT   1=input
    TRISC=%00000000   'set half C for in/out
    TRISB=%00000000   'set PortB to output
    ANSELH=%00000000   ' ADC OFF B
    ANSEL=%000000000 'configure PortA as digital except first 2
    ADCON1=%10000000  'adc justify
    OSCCON=%01110101  'SET FREQUENCY TO 8MHZ
    WPUB=%00000000    'turn off Pullups
    CM1CON0=0         'DISABLE COMPARATORS
    CM2CON0=0         'SAME HERE
    
    
    DEFINE OSC 8   
    DEFINE ADC_BITS 10
    DEFINE ADC_CLOCK 3
    DEFINE ADC_SAMPLEUS 50
    'lcd config
    pause 10
    ' Set LCD Data port 
    DEFINE LCD_DREG PORTC  
    DEFINE LCD_DBIT 4  
    DEFINE LCD_RSREG PORTB  
    DEFINE LCD_RSBIT 0  
    DEFINE LCD_EREG PORTB  
    DEFINE LCD_EBIT 1  
    DEFINE LCD_BITS 4  
    DEFINE LCD_LINES 2  
    DEFINE LCD_COMMANDUS 1500  
    DEFINE LCD_DATAUS 44
    
    
    
    
    SCLK	VAR	PORTB.5 'CLOCK
    TC	VAR	PORTC.0 'TO CHIP - WRITE
    FC	VAR	PORTC.6 'FROM CHIP - READ
    RST	VAR	PORTB.4 'RESET
    I VAR BYTE 'COUNTER VAR
    X VAR BYTE 'TEMP VAR
    FONT VAR BYTE [8] 'FONT ARRAY
    
    
    Reader: 'Font reading outline
    LOW RST         ' Ready for transfer
       Shiftout TC, SCLK, 5, [$03,$100,$00,$0] ' Send write command, set start offset 
    For I=0 to 255 'read 8 bytes of data
       Shiftin FC, SCLK, 5, [x]
    LCDOUT $fE, $C0, DEC I,32, DEC X
    Pause 200
    next
    HIGH RST        ' Reset IC
    GOTO READER

  2. #2
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    Default Re: 4 Wire SPI with Shiftin/Shiftout ?

    I'd try mode 5 for SHIFTOUT and mode 6 for SHIFTIN.
    I would also add some code to make sure #CS is high for a while during startup. Then I would add a scope or logic analyzer to verify that what you think is happening is actually happening at the hardware level.

  3. #3
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    Default Re: 4 Wire SPI with Shiftin/Shiftout ?

    I'd try mode 5 for SHIFTOUT and mode 6 for SHIFTIN.
    You can learn something everyday
    that seems to work with spi 25aa1024 eeprom
    Warning I'm not a teacher

  4. #4
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    Default Re: 4 Wire SPI with Shiftin/Shiftout ?

    Shiftout 6 changed nothing, so will hook up scope in logic analyzer mode and report.

  5. #5
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    Default Re: 4 Wire SPI with Shiftin/Shiftout ?

    Hooked scope to pins.
    There is series of pulses on SCLK and RST gets high and low as specified.
    However, there is no activity on serial input/output lines.
    To check the wiring, I wrote this simple code:

    Code:
    krd:
    high sclk
    high tc
    high rst
    high fc
    pauseus 500
    low sclk
    low tc
    low rst
    low fc
    pauseus 500
    goto krd
    And it works fine - I can see square pulses with scope on each pin, so there are no wiring issues.

    Any ideas?

  6. #6
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    Default Re: 4 Wire SPI with Shiftin/Shiftout ?

    One issue might be the fact that you have LCD datapins overlapping at least one of the pins that you're using with SHIFTIN/SHIFTOUT.
    This code does not match comment: TRISC=%00000000 'set half C for in/out.
    Also, note that my suggestion was to try mode 6 on SHIFTIN - not SHIFTOUT. Not that it would make any difference untill SHIFTOUT is outputting data.

  7. #7
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    Default Re: 4 Wire SPI with Shiftin/Shiftout ?

    not to mention. a 32bit address attempt ?

    Reader: 'Font reading outline
    LOW RST ' Ready for transfer
    Shiftout TC, SCLK, 5, [$03,$100,$00,$0] ' Send write command, set start offset
    For I=0 to 255 'read 8 bytes of data
    Shiftin FC, SCLK, 5, [x]
    LCDOUT $fE, $C0, DEC I,32, DEC X
    Pause 200
    next
    5.75 SHIFTOUT
    SHIFTOUT DataPin, ClockPin, Mode, [Var{\Bits}...]
    Synchronously shift out Var on ClockPin and DataPin. ClockPin and DataPin may be a constant, 0-15, or a variable that contains a number 0-15 (e.g. B0) or a pin name (e.g. PORTA.0).
    SHIFTOUT is a software-based command and does not require that the target device have synchronous serial capability. The ClockPin and DataPin parameters may be set to any digital I/O pins, and may be different in different commands within the same program.
    \Bits optionally specifies the number of bits to be shifted out. If it is not specified, 8 bits are shifted out, independent of the variable type. The Bits shifted out are always the low order bits, regardless of the Mode used, LSB or MSB. Up to 32 Bits can be shifted out of a single (long) variable. If more than 32 Bits are required, multiple variables or constants may be included between the square brackets.
    Warning I'm not a teacher

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