if an input pin on the module distinguishes between a high impedance high and a low impedance high then
its not a normal LVCMOS/LVTTL logic input , the data sheet has not described such a capability.
no point guessing ---- consult the salesman ---- Will do later today if possible and get back.
Just to help me - Data sheet says:

Inputs are internally pulled high, active low
Ok - This is my understanding / misunderstanding of how these things work - Please tell me which of these statements is correct / incorrect so that I can learn.

A/ INPUTS are high impedance 'Z' state (floating)
B/ 'Z' state could be anywhere from High to Low unless pulled into a High/Low state via a resistor(10k)
C/ OUTPUTS are just High / Low

Data sheet for Transmitter says 'Input internally held high' (So an internal pullup resistor to +v) and then pulled low via push button or in my case a Pic, this will cause a Tx, Lora Mode 5 is the Tx default (720ms) not sure if I hold Tx Input pin low for this length of time, another question for the sales guy I guess.