config looks ok while that osccon setting will work

osccon bit 7 SPLLEN: Software PLL Enable bit
If PLLEN in Configuration Word 2 = 1: ie & _PLLEN_ON
SPLLEN bit is ignored. 4xPLL is always enabled (subject to oscillator requirements)

and
osccon bit 2 is Unimplemented: Read as ‘0’

so osccon = $70 ; is the way i do it %01110000

you can also wait till OSCSTAT.6 is set [pll ready]
before any functions are used that need clock stability

while !OSCSTAT.6 : wend ;pll ready