Digital touch Screen Combination lock

[richard]

ports configured as analogue by default are read as low?

nearly , pins configured as analogue always read as low

[astanapane]

nearly , pins configured as analogue always read as low

these are my notes. I think i will try to understand why these happens.

What i cannot understand is the writting to the portx or to latx.

For example if we give alias:

LED1 var LATX

are we correspond the name to the LATX (not really writting to the LATX)

So the same applies for the PORTX

LED1 var PORTX

The problem comes as i understand when we really write to the LATx or PORTx. Values are different.

I need to do some exercises more on this.

[astanapane]

On the diagram above the Flip flop....is it an edge triggered D flip flop?

If so i will focus on the schematic and i will try to understand what is going on in there.

[richard]

On the diagram above the Flip flop....is it an edge triggered D flip flop?

makes no difference

[richard]

when you write to lata you write directly to the porta output latches, only the pins declared as outputs are connected to the pins via the trisa "switch".
when you write to porta you write directly to the porta output latches, only the pins declared as outputs are connected to the pins via the trisa "switch".
when you read porta you read the digital logic level of all the porta pins , analog pins always read low
when you read lata you read the porta output latches value not the digital logic level of all the porta pins
when you write to a lata.pin you read the porta output latch value into the alu then,
logically AND it with that pins bit value as 0 to CLEAR the pin
or
logically OR it with that pins bit value as 1 to SET the pin
then write the result back to the porta output latches

when you write to a porta.pin you read the porta pins value into the alu then,
logically AND it with that pins bit value as 0 to CLEAR the pin
or
logically OR it with that pins bit value as 1 to SET the pin
then write the result back to the porta output latches

if you did lesson one you would have noticed that port pins are subject to real world load conditions and that reading the pin value is not always what you wrote to it
you need to allow for pin loading

lesson two shows you can set and clear an analog pin made output but you can never read an analog pin properly

lesson three shows you can read and write to output latches but they may not represent the pin values of that port they are always what you last wrote to the latch



the diagram is for 1 pin

[astanapane]

im trying to understand what is going on with the help of the schematic , in lesson 1.

Please give me some time.

I just need to clarify something.

when you write to all LATA register "0", is that just a number or is a bit? For example if we write

LATA = 5

Is that a number or is translated to a binary 00000101.

So this writting to lat register

LATA = 5 

represents the 

LATA = %00000101

[richard]

5 dec = 5 hex = bin 101 , numbers are just numbers
all digital computers to date are binary devices and that's all they can cope with
programs like pbp C mpasm ...... allow humans to specify numbers in any form we are comfortable with

generally we have conventions to remove number base confusion
eg 5 = $5 = 0x05 =%00000101 = 0b00000101= %101 =$05 = %000000000000000101 . the chip only ever sees the binary version

[astanapane]

What i mean is if that numbers corresponds to 8 LATx for example for portA

For example if we write

LATA = 5

is that number correspond to binary 8 bit LATA.x , so that number 5 will write only to %00000101 which is the LATA.0 and LATA.2

Can we write a number then to only one LATA.x

for example can we write

LATA.0 = 5

What that number will represent for the LATA.0

based on the schematic logic gates receive only 0s or 1s. So LATA.x could only get 0s or 1s. Is that right?

[richard]

LATA = 5
replaces the entire contents of lata latch with 5

LATA.0 = 5

is a syntax error a bit can only be 0 or 1

lata.0 is bit 0 of the lata latch