Hi Folks,

I went ahead and made a pcb for the application and during layout decided to use the alternate DAC output of RA2 instead of RA0 to keep it free for ICSP.

Of course after etching and populating the pcb I have some nonsense happening on RA2 despite correctly reconfiguring the DAC registers (at least I think so!). The code below compiles, loads and runs correctly when configured for RA0 but RA2 Sits at 2.277V with RA0 running correctly. When set for RA2 it sits about 700mV varying slightly and RA0 is at 0V as you'd expect.

Have I missed something or am I having another senior's moment? While I can hack my pcb to achieve a solution using RA0 I'd like to have the option of being able to use RA2 as it was intended.

Thanks, stay safe,
Bill

Code:

'*********************************************************************************
'*  Name    : DACtest.pbp                               #### 1/2 Working code ####   *
'*  Date    : 02/08/20                                                           *
'*  Device  : 16F1705                                                            *
'*  Version : 1     (PBP 3.0.10.4)                                               *
'*********************************************************************************
'
'=========================================================================================================
'        CONFIGURE DEVICE
'=========================================================================================================
#CONFIG ; 16F1705
    __config _CONFIG1, _FOSC_INTOSC & _WDTE_ON & _PWRTE_ON & _MCLRE_ON & _CP_OFF & _BOREN_ON & _CLKOUTEN_OFF
    __config _CONFIG2, _WRT_OFF & _PPS1WAY_OFF & _ZCDDIS_OFF & _PLLEN_OFF & _STVREN_ON & _BORV_LO & _LPBOR_OFF & _LVP_OFF	   
#ENDCONFIG

' Connections as follows:
'     ****16F1705 PIC**** Comments
'
' Vdd          (pin 1)    5 volts.      
'         RA5  (pin 2)    T1clk.                Spare.       
'         RA4  (pin 3)	  AN3, T1G.             Spare.
' MCLR    RA3  (pin 4)    IOC.  Pull High 10k.  Spare.
'         RC5  (pin 5)	  Opamp2in+, CCP1.      Spare.
'         RC4  (pin 6)    Opamp2in-.            Serin for setting from laptop (9600).
'         RC3  (pin 7)    AN7, Opamp2Out, CCP2. Serout for monitoring (9600).      
'         RC2  (pin 8)    AN6, Opamp1Out.       Spare.
'         RC1  (pin 9)    AN5, Opamp1in-.       Spare.
'         RC0  (pin 10)   AN4, Opamp1in+.       Spare.
'         RA2  (pin 11)   AN2, DAC1out2.        DAC alternate output.
' ICSPclk RA1  (pin 12)   AN1, Vref+.           Spare.
' ICSPdat RA0  (pin 13)   AN0, DAC1out1.        Default output voltage from DAC.
' Vss  Ground  (pin 14)   

'=========================================================================================================
'        PIN ASSIGNMENTS, SYSTEM CONSTANTS, TEMPORARY VARIABLES
'=========================================================================================================
' Alias pins

'=========================================================================================================
' Variables
'=========================================================================================================
a   var byte                    ' Loop counter. 

'=========================================================================================================
' Constants
'=========================================================================================================
 
' -----[ Initialization ]---------------------------------------------------------------- 

'    Clear                       ' Reset all variables.

	INCLUDE "modedefs.bas"		' Include serial modes.
	
    DEFINE DEBUG_REG PORTC      ' Debug pin port.
    DEFINE DEBUG_BIT 3          ' Debug pin.
    DEFINE DEBUG_BAUD 9600      ' Debug baud rate
    DEFINE DEBUG_MODE 1         ' Debug mode: 0 = True, 1 = Inverted
'    DEFINE DEBUG_PACING 1000    ' Debug character pacing in us
    DEFINE DEBUGIN_BIT 4        ' Input pin.

    DEFINE  OSC 4               ' Adjust to suit design.
    OSCCON  = %01101011         ' Internal 4MHz osc.
'    OSCCON  = %01110011         ' Internal 8MHz osc.
'    OSCCON  = %01111011         ' Internal 16MHz osc.
'    OSCCON  = %11110011         ' Internal 32MHz osc PLL.

    OPTION_REG.7 = 1            ' Disable weak pullups.
'    OPTION_REG.7 = 0            ' Enable weak pullups.

'    DEFINE ADC_BITS 10          ' Set number of bits in result.
'    DEFINE ADC_CLOCK 3          ' Set clock source (rc = 3).
'    DEFINE ADC_SAMPLEUS 50      ' Set sampling time in microseconds. 

    ADCON0 = 0                  ' No ADC.
'    ADCON0 = %00000001          ' Enable ADC.
'    ADCON1 = %10000000          ' Right justify, Frc, use Vdd for Vref.
'    ADCON2 = %00000000          ' No Trigger selects.

    ANSELA = 0                  ' Disable ADC.
'    ANSELA = %00000100          ' AN2 the rest Dig.
'    ANSELC = %00000000          ' All Dig.

    CM1CON0 = 0                  ' Comparators off.

'    FVRCON = %0                 ' Disabled.
    FVRCON = %11000101          ' Enabled, Vref 1.024V.
'    DAC1CON0 = %10101000        ' Vref from FVR, DAC1out1 (RA0).
'=========================================================================================================
' ####### RA2 Sits at 2.277V with RA0 selected and running correctly.
    DAC1CON0 = %10011000        ' Vref from FVR, DAC1out2 (RA2).  
'=========================================================================================================
'    DAC1CON0 = %10111000        ' Vref from FVR, both outputs (RA0, RA2).  [Not sure if this is possible]
    DAC1CON1 = %10000000        ' Set initial output value to 50% of Vref.

    TRISA = %000000             ' All output.
    TRISC = %010000             ' C.4 serial in.

    latC.3 = 0                  ' Else first serial chars can be garbled...
    Pause 1000					' Short wait for things to settle.
debug "I'm Alive!", 13,10       ' Eureka moment.
    pause 3000                  ' Time enough to gloat.
    goto First                  ' Jump subs.

'=========================================================================================================
' Subroutines
'=========================================================================================================

'=========================================================================================================
' Main
'=========================================================================================================
First:  
    for a = 0 to 255 step 7 ' Some coarse jumps.
    DAC1CON1 = a
debug "DAC = ",#a,13,10     ' 
    pause 2000              ' Let the DMM settle.
    next
    goto first              ' Cycle.

    end