Re: Tiny bootloader and pbp
dave
my pic config has currently set to protect memory , is this a problem for the bootloader ?
also what changes need to be done to the pbp code to allow bootloader to work , i have read that addtional defines are required for other bootloaders such as
DEFINE LOADER_USED 1
DEFINE RESET_ORG 800h ' For Microchip USB Bootloader
DEFINE INTERRUPT_ORG 808h ' For Microchip USB Bootloader
are these required for tiny bootloader ???
Code:radix DEC list p=18f87k22 ; change these lines accordingly to your application #include "p18f87k22.inc" IdTypePIC = 0x6F ; Please refer to the table below, must exists in "piccodes.ini" #define max_flash 0x20000 ; in WORDS, not bytes!!! (= 'max flash memory' from "piccodes.ini" divided by 2), Please refer to the table below #define SELECTEUSART 1 ; EUSART(1/2), Please refer to the table below #define PDIP 80 ; PIN Count of Device (64/80), Please refer to the table below xtal EQU 64000000 ; you may also want to change: _HS_OSC _XT_OSC baud EQU 19200 ; standard TinyBld baud rates: 115200 or 19200 ; The above 7 lines can be changed and buid a bootloader for the desired frequency (and PIC type) ; +---------+--------+------------+------------+-------------+-------------+-----------+--------+------+ ; |IdTypePIC| Device | Write_Page | Erase_Page | TX1/TX2 | RX1/RX2 | max_flash | EEPROM | TQFP | ; +---------+--------+------------+------------+-------------+-------------+-----------+--------+------+ ; | 0x6C |18F65K22| 32 words | 32 words |C6(31)/G1(4) |C7(32)/G2(5) | 0x8000 | 1024 | 64 | ; | 0x6C |18F85K22| 32 words | 32 words |C6(37)/G1(6) |C7(38)/G2(7) | 0x8000 | 1024 | 80 | ; | 0x66 |18F66K22| 32 words | 32 words |C6(31)/G1(4) |C7(32)/G2(5) | 0x10000 | 1024 | 64 | ; | 0x66 |18F86K22| 32 words | 32 words |C6(37)/G1(6) |C7(38)/G2(7) | 0x10000 | 1024 | 80 | ; | 0x6F |18F67K22| 64 words | 64 words |C6(31)/G1(4) |C7(32)/G2(5) | 0x20000 | 1024 | 64 | ; | 0x6F |18F87K22| 64 words | 64 words |C6(37)/G1(6) |C7(38)/G2(7) | 0x20000 | 1024 | 80 | ; +---------+--------+------------+------------+-------------+-------------+-----------+--------+------+ #IF (SELECTEUSART == 1) #define _TXSTA TXSTA1 #define _SPBRG SPBRG1 #define _RCSTA RCSTA1 #define _TXREG TXREG1 #define _PIR PIR1 #define _RCIF RC1IF #ELSE #define _TXSTA TXSTA2 #define _SPBRG SPBRG2 #define _RCSTA RCSTA2 #define _TXREG TXREG2 #define _PIR PIR3 #define _RCIF RC2IF #ENDIF ;******************************************************************** ; Tiny Bootloader 18F6XK22/18F8XK22 Size=100/132words ; [email protected] ; http://www.etc.ugal.ro/cchiculita/software/picbootloader.htm ; (2018.04.18 Revision 6) ; ; This program is only available in Tiny Multi Bootloader +. ; ; Tiny Multi Bootloader + ; https://sourceforge.net/projects/tinypicbootload/ ; ;******************************************************************** #include "spbrgselect.inc" ; RoundResult and baud_rate #if(IdTypePIC == 0x6F) #define first_address max_flash-264 ;132 words #else #define first_address max_flash-200 ;100 words #endif ;Setup CONFIG1L config RETEN = ON ;Enabled - Controlled by SRETEN bit config INTOSCSEL = HIGH ;LF-INTOSC in High-power mode during Sleep config SOSCSEL = DIG ; Digital (SCLKI) mode; I/O port functionality of RC0 and RC1 is enabled config XINST = OFF ;Instruction set extension and Indexed Addressing mode disabled (Legacy mode) ;Setup CONFIG1H config FOSC = HS2 ; HS oscillator (High power, 16 MHz - 25 MHz) - makes OSC1 input PREAMP active for TCXO 16.386 0.8VPP config PLLCFG = ON ;PLL x4 Enable bit Disabled config FCMEN = OFF ;Fail-Safe Clock Monitor disabled config IESO = OFF ;Oscillator Switchover mode disabled ;Setup CONFIG2L config PWRTEN = ON ;PWRT enabled config BOREN = SBORDIS ; Enabled in hardware, SBOREN disabled config BORV = 2 ;VBOR set to 2 V nominal config BORPWR = ZPBORMV ; ZPBORMV instead of BORMV is selected ;Setup CONFIG2H config WDTEN = ON ;WDT is controlled by SWDTEN bit of the WDTCON register config WDTPS = 512 ;Watchdog Timer Postscale Select bits 1:512 ;Setup CONFIG3L config RTCOSC = SOSCREF ;RTCC uses SOSC #if (PDIP == 80) config EASHFT = ON ;Address Shifting ENABLED config ABW = MM ;Microprocessor mode , External Memory bus not used - allows portsD,E,H,J for I/O use ;MM = also ignores MEMCON.7=0 (default POR) setting for EMB use config BW = 16 ;16-bit external bus mode config WAIT = OFF ;Disabled #endif ;Setup CONFIG3H config CCP2MX = PORTC ;CCP2 input/output is multiplexed with RC1 #if (PDIP == 80) config ECCPMX = PORTE ;Enhanced CCP1/3 [P1B/P1C/P3B/P3C] muxed with RE6/RE5/RE4/RE3 #endif config MSSPMSK = MSK7 ;7 Bit address masking mode config MCLRE = ON ;MCLR pin enabled RG5 input pin disabled ;Setup CONFIG4L config STVREN = OFF ;Stack full/underflow will not cause Reset config BBSIZ = BB1K ;1K word Boot Block size config DEBUG = OFF ;Background debugger disabled, RA0 and RA1 configured as general purpose I/O pins ;Setup CONFIG5L config CP0 = ON ; MEMORY BLOCK 0 CODE PROTECT BIT - 7KW 800h - 3FFFh ( when 1K BOOT OPTION used ) config CP1 = ON ; MEMORY BLOCK 1 CODE PROTECT BIT - 8KW 4000h - 7FFFh config CP2 = ON ; MEMORY BLOCK 2 CODE PROTECT BIT - 8KW 8000h - BFFFh config CP3 = ON ; MEMORY BLOCK 3 CODE PROTECT BIT - 8KW C000h - FFFFh #if (IdTypePIC == 0x6F) config CP4 = ON ; MEMORY BLOCK 4 CODE PROTECT BIT - 8KW 10000h - 12FFFh config CP5 = ON ; MEMORY BLOCK 5 CODE PROTECT BIT - 8KW 14000h - 17FFFh config CP6 = ON ; MEMORY BLOCK 6 CODE PROTECT BIT - 8KW 18000h - 1BFFFh config CP7 = ON ; MEMORY BLOCK 7 CODE PROTECT BIT - 8KW 1C000h - 1FFFFh #endif ;Setup CONFIG5H config CPB = OFF ;Boot block not code-protected config CPD = ON ;Data EEPROM code-protected ;Setup CONFIG6L config WRT0 = OFF ;Block 0 not write-protected config WRT1 = OFF ;Block 1 not write-protected config WRT2 = OFF ;Block 2 not write-protected config WRT3 = OFF ;Block 3 not write-protected #if (IdTypePIC == 0x6F) config WRT4 = OFF ;Block 4 not write-protected config WRT5 = OFF ;Block 5 not write-protected config WRT6 = OFF ;Block 6 not write-protected config WRT7 = OFF ;Block 7 not write-protected #endif ;Setup CONFIG6H config WRTC = ON ;Configuration registers write-protected config WRTB = ON ;Boot block write-protected config WRTD = OFF ;Data EEPROM not write-protected ;Setup CONFIG7L config EBRT0 = OFF ;Block 0 not protected from table reads executed in other blocks config EBRT1 = OFF ;Block 1 not protected from table reads executed in other blocks config EBRT2 = OFF ;Block 2 not protected from table reads executed in other blocks config EBRT3 = OFF ;Block 3 not protected from table reads executed in other blocks #if (IdTypePIC == 0x6F) config EBRT4 = OFF ;Block 4 not protected from table reads executed in other blocks config EBRT5 = OFF ;Block 5 not protected from table reads executed in other blocks config EBRT6 = OFF ;Block 6 not protected from table reads executed in other blocks config EBRT7 = OFF ;Block 7 not protected from table reads executed in other blocks #endif ;Setup CONFIG7H config EBRTB = OFF ;Boot block not protected from table reads executed in other blocks ;----------------------------- PROGRAM --------------------------------- cblock 0 buffer:14 crc i flag cnt1 cnt2 cnt3 endc ;0000000000000000000000000 RESET 00000000000000000000000000 ORG 0x0000 GOTO IntrareBootloader ;view with TabSize=4 ;&&&&&&&&&&&&&&&&&&&&&&& START &&&&&&&&&&&&&&&&&&&&&& ;---------------------- Bootloader ---------------------- ;PC_flash: C1h U H L 64/128 ... <64/128 bytes> ... crc ;PC_eeprom: C1h 40h EEADRH EEADR 1 EEDATA crc ;PC_cfg C1h U OR 80h H L 14 ... <14 bytes> ... crc ;PIC_response: type `K` ORG first_address ;space to deposit first 4 instr. of user prog. nop nop nop nop org first_address+8 IntrareBootloader: ;Init int clock & serial port lfsr FSR1,_TXREG ;FAR1 = TXREG1 or TXREG2 bsf OSCCON,IRCF0 ;int clock 16MHz #if (SELECTEUSART == 2) movlb .15 ;bank0 -> bank15 clrf ANCON2,BANKED ; setup digital I/O #endif movlw ((1<<TXEN) | (1<<BRGH)) ;init serial port movwf _TXSTA,BANKED movlw spbrg_value movwf _SPBRG,BANKED movlw ((1<<SPEN) | (1<<CREN)) movwf _RCSTA,BANKED movlb .0 ;bank15 -> bank0 ;wait for computer rcall Receive sublw 0xC1 ;Expect C1h bnz way_to_exit movlw IdTypePIC ;send PIC type movwf INDF1 MainLoop: movlw 'C' ; "-Everything OK, ready and waiting." mainl: movwf INDF1 clrf crc rcall Receive ;Upper movwf TBLPTRU movwf flag rcall Receive ;High movwf TBLPTRH movwf EEADRH ;(for EEPROM case) rcall Receive ;Low movwf TBLPTRL movwf EEADR ;(for EEPROM case) rcall Receive ;Count movwf i clrf FSR0L ;FSR0 = Buffer TOP tblrd*- ;TBLPTR = TBLPTR - 1 rcvoct: rcall Receive btfsc flag,7 ;Skip if not Config movwf POSTINC0 ;(for Config case) movwf EEDATA ;(for EEPROM case) movwf TABLAT ;(for PFM case) tblwt+* decfsz i,F bra rcvoct rcall Receive ;CRC ziieroare: ;CRC failed movlw 'N' bnz mainl btfsc flag,7 ;Skip if not Config bra wr_cfg ;Write Config movlw (1<<WREN) ;Setup EEPROM btfss flag,6 ;Skip if EEPROM rcall Erase rcall Write bra MainLoop wr_cfg: decf FSR0L,F ;FSR0 = FSR0 - 1 movf INDF0,W ;Set TABLAT movwf TABLAT movlw ((1<<EEPGD)|(1<<CFGS)|(1<<WREN));Setup cfg rcall Write tblrd*- ;TBLPTR = TBLPTR - 1 tstfsz FSR0L ;FSR0L = 0 ? bra wr_cfg bra MainLoop ;************************ Subroutines ************************ Erase: movlw ((1<<EEPGD)|(1<<FREE)|(1<<WREN)); Setup erase Write: movwf EECON1 movlw 0x55 movwf EECON2 movlw 0xAA movwf EECON2 bsf EECON1,WR retlw ((1<<EEPGD)|(1<<WREN)) ; Setup writes Receive: movlw (xtal/2000000+1) ; for 20MHz => 11 => 1second delay movwf cnt1 rpt2: clrf cnt2 rpt3: clrf cnt3 rptc: btfss _PIR,_RCIF ;test RX bra notrcv incf FSR1L,F ;FSR1 = RCREG1 or RCREG2 -> TXREG1 or TXREG2 movf POSTDEC1,W ;return read data in W addwf crc,F ;compute crc return notrcv: decfsz cnt3,F bra rptc decfsz cnt2,F bra rpt3 decfsz cnt1,F bra rpt2 ;timeout way_to_exit: clrf EECON1 ; deactivate EECON movlb .15 bcf _SPBRG,SPEN ; deactivate UART movlb .0 bra first_address ;************************************************************* ; After reset ; Do not expect the memory to be zero, ; Do not expect registers to be initialised like in catalog. END
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