Assembly Interrupts for PIC 18F27K42

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  1. #1
    Join Date
    Mar 2020

    Default Assembly Interrupts for PIC 18F27K42

    The attached file demonstrates implementing non-vectored interrupts in assembly for a PIC 18F27K42. For this exercise, Timer1 and Timer3 are configured to run concurrently and each generates an interrupt on rollover. The interrupt service routine (ISR) demonstrates how to: disable additional interrupts during processing the current interrupt; determine which timer generated the interrupt; increment a rollover counter; reset the interrupt flag; re-enable interrupts; and return to the main program. All Timer and interrupt configuration is handled in the main code. The Main code includes a forever loop that toggles indicator LEDs when each timer counter equals a predefined trigger value. I do not code in Assembler, so there are likely better ways to do this. It works for my application, which is measuring time values for a tach measuring RPM from <100 to >11K. References for my approach include Section 6.3 of the PBP3 compiler reference manual; Section 41 Instruction Set Summary of the PIC18F27K42 datasheet; and various internet sources, including discussions on this forum.
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  2. #2
    Join Date
    Aug 2011

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    Default Re: Assembly Interrupts for PIC 18F27K42

    disable additional interrupts during processing the current interrupt
    You should never manipulate the GIE bit inside the ISR. That is handled automatically when you get the intr, and then RETFIE restores it on exit.
    Remove those two instructions.

  3. #3
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    Mar 2020

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    Default Re: Assembly Interrupts for PIC 18F27K42

    Thanks for the comment, it should assist others in learning how to implement an ISR in Assembly. Consistent with that objective, I was able to find a Microchip reference (Section 8.1 of Microchip's PICmicro MID-RANGE MCU FAMILY) that states that the “return from interrupt” instruction, RETFIE, exits the interrupt routine as well as sets the GIEbit, which allows any pending interrupt to execute. The same document goes on to state, "When an interrupt is responded to, the GIE bit is cleared to disable any further interrupt, the return address is pushed into the stack and the PC is loaded with 0004h." While it is not explicitly stated, it seems reasonable to assume that this is being done in hardware. The demo code was edited as suggested.
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    Last edited by dtbarber; - 19th May 2020 at 17:58. Reason: Added edited code

  4. #4
    Join Date
    Dec 2010
    Melbourne Australia

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    Default Re: Assembly Interrupts for PIC 18F27K42

    Thanks for this. I'm trying to implement a completely different interrupt on an 18F26K83 and this is the closest thing I've seen so far as a starting point.


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