Asm sleep - pbp sleep

[richard]

its all the same problem
what bank is baudcon in?
what bank is porta or portc in ?

ASM
BTFSS BAUDCON,RCIDL ;Check for High, no receive in progress
GOTO $-1 ;return to previous line
BSF BAUDCON,WUE ;Wake on Rx from Master
BSF PORTA,1 ;LED
SLEEP
BSF PORTC,1 ;LED
nop
nop
nop ; Should be in sleep for 10sec.
ENDASM

[sayzer]

Your MCLRE is ON.
If you are using power adapter (not battery), make sure you have 100nf cap from MCLRE pin to GND. And I am not even asking about 4K7 - 10K res to vdd; Assuming it is already there.

And, if the osc is giving you issues somehow, then try OSCCON=%01110010.
And check OSC stable bits in OSCSTAT.

[richard]

if you are going to do this sort of thing in asm then you need to understand how banked memory access is
used for this chip. hint [ baudcon is not in access bank ]

[MOUNTAIN747]

if you are going to do this sort of thing in asm then you need to understand how banked memory access is
used for this chip. hint [ baudcon is not in access bank ]

Thanks guys for all your replies. I really do appreciate the time you've
taken.
So Richard, I should have understood what you were saying the first time. I converted all code to PBP and it looks like RCIDL is set after all. However it didn't change the results.
I then went to battery power, no change. Still a reset every 2.14sec. I also changed several of the configs with no change in results. I may mark this one up as part of the magical mystery tour as I have a work around for the problem. This is one of a couple problems that I could never solve. The other was the inability to make RA.7 a digital I/O. I wonder if my software has some corruption. Yea, when all else fails blame it on the software. Wayne

[Ioannis]

Did you set WDT to OFF?

Ioannis

[Ioannis]

OK, here is the explanation about the NOP:

When the SLEEP instruction is being executed, the next
instruction (PC + 1) is prefetched. For the device to
wake-up through an interrupt event, the corresponding
interrupt enable bit must be set (enabled). Wake-up
occurs regardless of the state of the GIE bit. If the GIE
bit is clear (disabled), the device continues execution at
the instruction after the SLEEP instruction. If the GIE bit
is set (enabled), the device executes the instruction
after the SLEEP instruction, then branches to the interrupt
address (0004h). In cases where the execution of
the instruction following SLEEP is not desirable, the
user should have a NOP after the SLEEP instruction.
The WDT is cleared when the device wakes up from
Sleep, regardless of the source of wake-up.

The key is that before SLEEP the next command is prefetched and might not be what one wants right after a wake, especially after wake from interrupt.

Ioannis

[richard]

a 2 sec reset looks very likely to be wdt



after disabling wdt i would try something like this

SleepMode:
    PortA.1=0     ;Indicator LED out on entering SLEEP
ASM
    BANKSEL BAUDCON  ;bank 3
    BTFSS   BAUDCON,RCIDL  ;Check for High, no receive in progress
    GOTO $-1                
    BSF BAUDCON,WUE        ;Wake on Rx from Master 
    BANKSEL 0  ;bank 0
    BSF  PORTC,1   ;LED 
    BCF INTCON ,7
    SLEEP
    nop
    BSF INTCON ,7
ENDASM
    PortA.1=1                   ;Indicator LED ON  at exit SLEEP
    return
    end

[sayzer]

.....

  SLEEP
    nop
    BSF INTCON ,7

Wayne,
Pay attention to Rihard's code there. The first ting after SLEEP must be NOP.
You did not have NOP as the first thing atfer SLEEP in your code.

and WDT is OFF in config; how can it be an issue?