Controlling OG-4 Decathron with PBP in an efficient way.

[mpgmike]

Most everything PIC made in the past decade features LATx Registers;
LATB.0 = 1
(Of course you could also insert a bit of ASM if FOSC cycles are important
@ BANKSEL LATB
@ BSF LATB,0

[CuriousOne]

For this particular case, speed is not an issue, since these tubes have couple of KHz max operating frequency, and in my case there are Pause 30 and Pause 1000 statements

[CuriousOne]

Run into strange problem - setting GPIO.5 as input messes with GPIO.4 - it becomes high when GPIO.5 is read, so disrupts complete code routine. I'm using TRISIO=%00100000 to make GPIO.5 as input. If I disable it as input, then other code works fine.

[mpgmike]

In your code at the top of the page you list TRISIO=%00001000. Of course GPIO.3 is MCLR and is Input only. In the previous post you state you are having problems with TRISIO=%00100000. It's probably not your issue, but try TRISIO=%00101000.

[CuriousOne]

It does not helps. And I'm not using MCLR pin for anything except programming. Tried TRISIO=%00101000 but that does not helps. Tried disabling MCLR from config, also no change. Making a pin input creates issues with others being output.

[mpgmike]

Did you try a new PIC? I've never seen what you're describing. Thinking something internal might be whacked.

[richard]

its a classic rmw problem.
can also be caused by excessive load on output pin (capacitive or resitive) causing pin to not achieve proper logic level.

[CuriousOne]

I tried to replace HIGH/LOW statements with TRISIO.X=1 or 0, it does not helps. In fact, say TRISIO.0=1 does not make GPIO.0 pin high.