16F887 - PORT pins interfere with each other when set high/low

[CuriousOne]

MCLR is disabled and used as button input - tied to VDD via 10K resistor and button pulls it down to VSS. It works fine.

[mpgmike]

Hmmm, if you are using a 10k pull-up to VDD and a button to ground, do you have an additional 10k resistor between the button and PORTA.0? If so you have a voltage divider possibility where the Input thresholds occasionally do not exceed min/max, thus the sporadic results. (again, stabbing at unknowns)

Try using 4.7k resistors instead of 10k resistors for isolation. I had a project where I used 10k for MCLR. It was used in a noisy environment where it would occasionally RESET. I replaced the 10k with a 4.7k and the unintended RESET stopped.

[Ioannis]

Today I checked your code. Changed IESO in the configs and a bit in OSCCON which was read only.

Works just fine. Only thing is that LED on portb.7 is interfering with the programming and causing programming errors!

Besides that everything works just fine on the F887 chip at 8MHz.

#CONFIG
cfg1 = _INTRC_OSC_NOCLKOUT    ; INTOSCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN
cfg1&= _WDT_ON                ; WDT enabled
cfg1&= _PWRTE_OFF             ; PWRT disabled
cfg1&= _MCLRE_OFF             ; RE3/MCLR pin function is digital input, MCLR internally tied to VDD
cfg1&= _CP_OFF                ; Program memory code protection is disabled
cfg1&= _CPD_OFF               ; Data memory code protection is disabled
cfg1&= _BOR_OFF               ; BOR disabled
cfg1&= _IESO_OFF               ; Internal/External Switchover mode is enabled
cfg1&= _FCMEN_ON              ; Fail-Safe Clock Monitor is enabled
cfg1&= _LVP_OFF               ; RB3 pin has digital I/O, HV on MCLR must be used for programming
cfg1&= _DEBUG_OFF             ; In-Circuit Debugger disabled, RB6/ICSPCLK and RB7/ICSPDAT are general purpose I/O pins
  __CONFIG _CONFIG1, cfg1


cfg2 = _BOR40V                ; Brown-out Reset set to 4.0V
cfg2&= _WRT_OFF               ; Write protection off
  __CONFIG _CONFIG2, cfg2
#endconfig

OSCCON=%01110001  'SET INTOSC TO 8MHZ

ANSEL = %00000000
ANSELH = %00000000 'disable ADC


TRISC=%00000000 'set PORTC as output all
TRISD=%00000000 'set PORTD as output all
TRISB=%00000000 'set PORTB as output all
TRISA=%00000001 'set PORTA 0 as input, others as output
TRISE=%00000000 'same here
BUZ var PORTB.7
BUTN var PORTA.0 



DEFINE OSC 8   'OSC SPEED
'turn off all digits


PORTA=0: PORTB=0: PORTC=0: PORTD=0 : PORTE=0 'turn off all outputs

CYCLER:
if BUTN=0 then
high BUZ
pause 100
low BUZ
pause 100
endif
goto CYCLER

end

I did a short video that shows a working state of the circuit on a PICdem2 Plus board. The PortA.0 is shorted by the yellow wire to ground.



Ioannis

[CuriousOne]

Thanks, will check your code on my hardware today later....

[CuriousOne]

Found another curiosity. There are two ways of setting PORTA.0 as ADC input on 887.

ANSEL=%00000001
ANSELH=%00000001

Both work equally. However, if ANSELH=%00000001 and ADCin statement is used (if not used, no problems), PORTB.2 becomes high

Figured it out by trial and error

[Ioannis]

Obviously you missed that the default is all inputs set to ANALOG IN.

So if you do not do anything all ports with ADC support are, by default, on Power On set analog inputs!

Even if you don't use ANSELx.

But if you use BOTH ANSEL and ANSELH to set the digital and analog inputs, it is not possible to have analog in on PortB.0 using this:

ANSEL=%00000001
ANSEL=%00000000

PortB.0 will be Digital, either in or out defined by TRIS.

Ioannis

[CuriousOne]

I have all TRIS and other settings set