Normal i/o required on portc , pin6, 7 18f27k40

[mpgmike]

 PPSLOCK    =   $55                 ;PPS Unlock Sequence
 PPSLOCK    =   $AA
 PPSLOCK    =   0
RC6PPS = 0
RC7PPS = 0
 PPSLOCK    =   $55                 ;PPS Lock Sequence
 PPSLOCK    =   $AA
 PPSLOCK    =   1

[longpole001]

thanks mike ill give that ago ,


i have not locked down pps at any point so i should not need to unlock it , from what i currenlty understand of the k40 series

[Dave]

That is right Sheldon, But you do initially have to unlock the PPS register. It's up to you to lock it after or as I do, leave it unlocked so as to make later changes to it.

[tumbleweed]

You shouldn't have to make any changes to the PPS registers or the PPSLOCK unless you've done something to change them.

The PPSLOCK powers up as unlocked, and the PORT pins default to the PORT data latch (no PPS in effect at reset).

PORTC should work after setting up the TRISC and ANSELC registers.

[Dave]

Yes Sheldon, Tumbleweed is right, as long as " CONFIG PPS1WAY = OFF " is set in this way at processor configuration. All "RxyPPS pins default to the "LATxy" upon "POR". However peripherals inputs default to the states listed in section 17.1 of the data sheet.

[tumbleweed]

Dave, I think the PPS1WAY config bit only controls whether or not you can change the PPSLOCK bit once you've written to it to set it.

If you never lock the pps in the first place then you don't need to unlock it, so that setting shouldn't matter.

[longpole001]

hi dave

well setting
RC6PPS = 0
RC7PPS = 0

allowed the pins to work as I/O on portc pins6,7, in this case both pins are outputs
prior to the above command both pins were high by default and only dipped 0.7v when asked to change to a low state , which made me consider they were acting as usart1 pins


I did not have to unlock the pps
i have not set the lock pps bit in the config

also PMD4 - Usart was not active , but still the pins were effected , but thats not a big surprise

so what other PPS port pins need to be set to 0 on each port before they can be used as standard i/o , clearly not all as other port pins have responded as expected from TRIS, perhasp is it is just the USART's ???

or should the standard approach for each port be ,to set RxyPPS = 0 , done in each port section, and only changed from 0 / command removed when a PPS fuction is required on those pins

table 17.1. at POR shows for PPS inputs port pins , this appears to override TRIS settings until RxyPPS = 0 is set , thus allowing TRIS standard i/o of those pins ???

If table 17.2 has no POR for outputs , then i should not need to to do RxyPPS = 0 before the port worked as standard I/O , but clearly i needed to do it so that USART1 was not effected on portc,pin6, 7 ?

a little confusing

cheers

Sheldon