How Do we configure the rest of the TRIS bits?
when you read
Setting the SPEN bit of the
RCSTAx register enables the EUSART and
automatically configures the TXx/CKx I/O pin as an
output.
in the eusart section it means its unnecessary to clear the tris bit for the tx pin, keep in mind that on some chips clearing the tx pin tris bit
will stop the eusart from working . I prefer to form good habits ,although the 18f26k22 does not seem to object and functions either way .