Error when compiling with DT_INTS_3_4b"

[pedja089]

I didn't use K40. But it shouldn't be too hard to implement that.
As you have only one INT source. TMR2 INT should be disabled. As you need timer 2 only for PWM.

[tumbleweed]

wondering if you played with the priority interupt system on the k40 it self

Why would you do that? The file already takes care of that, and if you try and bypass it bad things will likely happen.

From the code block shown it looks like the only high-priority ISR you're using is the IOC.
Does your routine properly handle the steps required to clear the interrupt?
That's one of those that can't be cleared automatically since you have to clear the individual register/bit.

[longpole001]

yes had to place a reset interupt in each isr , when the isr is part of the low priorty,

the reset was not required in each isr when part of high priorty

thought the 18-int-k40 sorted it out when in low priorty as it did in high priorty /normal interupt handling
but it does not

[tumbleweed]

IOC is different from the other interrupts in that there are individual flags in the IOCxF registers that you have to clear manually.

The DT-INTs routine doesn't know which of these you're using, so you have to do it yourself.
It will try and clear the IOCIF bit in PIR0, but that bit is read-only so trying to clear that doesn't have any effect.

I don't think the interrupt priority setting has anything to do with this.