Help with PWM6 and PWM7 on 16F18857 ???

[picster]

Actually that's ALL the Code... so I need to check the configuration word settings (I do this when prompted the programmer interface pops up) to ensure it's not locked, is that correct?

I'm ignoring all the Timer2 config stuff because I'm going with the assumption that it's already set up to the correct period via the HPWM commands.

[mpgmike]

I personally have not had very good luck assuming anything. I tend to spell everything out as a matter of routine and habit. You might have to manipulate your PWM6/7 outputs manually with the PWM6/7DCH/L SFRs. Not that big of deal once you delve in and learn how. The data sheets are pretty concise about how it needs to be done. I would list the TMR2 SFRs just to be sure. Also, the default timer for ALL CCP and PWM functions is TMR2. There are a few things pertaining to PWM6/7 in the CCP section of the Data Sheet.

[picster]

Might be best to abandon using the CCP HPWM at the same time until I get PWM6/7 working, that way I can config the timer registers independently and know exactly what they are. I can break off and use TMR4 later if I find that CCP PWM interferes.

[richard]

There is no technical reason that prevents simultaneous pwm use of all the CCP and PWM modules with the same timer .
I just made this example with mplabx/xc8 , it works exactly as expected.
I cannot try it with pbp as my version does not support that chip

[picster]

Good to know, thanks for the input!

I've probably missed something simple, but still can't see it in my code snippet.

[picster]

Ok, thanks all for verifying approach. I found the issue to be that the resolution of the duty cycle in bits was 9, not 10, (it seems it varies with the PR2 value predetermined by the HPWM command), so with the MSB of the PWMxDCH set at 1 (PWM6DCH=128), the result was "always on" at the output, whereas I was anticipating a 50% duty cycle waveform.

[picster]

Ok, thanks all for verifying approach. I found the issue to be that the resolution of the duty cycle in bits was 9, not 10, (it seems it varies with the PR2 value predetermined by the HPWM command), so with the MSB of the PWMxDCH set at 1 (PWM6DCH=128), the result was "always on" at the output, whereas I was anticipating a 50% duty cycle waveform.

Note that this was at 1KHz HPWM on CCP1 through 5. At 2KHz, you regain full 10 bit resolution again, according to my trials (using a clock speed of 8MHz).