Unwanted pulse on PortC.1 on 16F876


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  1. #1
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    Unhappy Unwanted pulse on PortC.1 on 16F876

    I have scanned the posts for similar problems to the one I am detailling below but to be honest I'm not exactly sure what to look for.
    I am using a 16F876 (4Mhz) to drive two DS1267 digital pots on Port C. The two RST (chip select lines) of the Ds1267's are connected to RC0 and RC1 respectively. The clock (CLK) and data (DQ) lines are paralleled and connect to RC2 and RC3.
    The program selects the appropriate DS1267 by sending either RC0 or RC1 high then uses SHIFTOUT to write the data.
    When RC0 goes high a pulse appears on RC1 that is sufficiently long enough to confuse the hell out of the other DS1267. However, the reverse is not true, i.e. when RC1 goes high no pulse appears on RC0 so it works fine.
    This extra pulse is driving me nuts!
    I suspect it has something to do with Timer1 or even CCP2 that are multiplexed on these two ports. I must admit that even after reading the datasheet for the 876 I am not proficient enough to understand how to ensure these functions are off. Of course there's a very real chance it has nothing to do with these functions and I'm barking up the wrong proverbial tree.
    There must be someone who knows where these extra pulses come from and how I can stop them.
    Thanks.

  2. #2
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    Wink

    Hi, Muttley

    a small relevant piece of code and the PortC to DSs scheme are really welcome ...

    too much solutions without those two things !!!

    Alain

  3. #3
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    Unhappy Pinouts and Code for pulse problem

    Hi Acetronics,
    Does this help?

    Pinout:
    1 ]
    6 ]RC0 (pin11) >>>> DS1267(1) RST (pin5)
    F ]RC1 (pin12) >>>> DS1267(2) RST (pin5)
    8 ]RC2 (pin13) >>>> DS1267(both) CLK (pin6)
    7 ]RC3 (pin14) >>>> DS1267(both) DQ (pin8)
    6 ]

    Code

    DEFINE OSC 4
    DEFINE SHIFT_PAUSEUS 100
    DEFINE CHAR_PACING 100 'add 100 uSec extra stop bit

    rst1 var PORTC.0 'DS1267 POT1 chip select port
    rst2 var PORTC.1 'DS1267 POT2 chip select port
    clk var PORTC.2 'DS1267 POTS clock port
    dq var PORTC.3 'DS1267 POTS Data port
    ampwiper var byte 'DS1267 pot wiper positions
    sparewiper var byte
    pwwiper var byte
    freqwiper var byte

    OUTPUT rst1: OUTPUT rst2: OUTPUT clk: OUTPUT dq

    high rst1
    SHIFTOUT dq,clk,1,[%0\1,ampwiper,sparewiper] 'Code required to write to DS1267
    low rst1

    The last three lines seem to put the unwanted pulse on PORTC.1
    However,

    high rst2
    SHIFTOUT dq,clk,1,[%0\1,freqwiper,pwwiper]
    low rst2

    Does not put a pulse on PORTC.0

    Cheers
    Muttley

  4. #4
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    Wink

    Ok for the code,

    But scheme ( are there pullup or pulldown resistors ....) etc, etc
    Would be great ...

    Alain

  5. #5
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    Default

    Hi Muttley,

    It's hard to tell if it's a single pass program, or if the statements were extracted from other subroutines. but, assuming it's single pass (as shown).

    When a PIC first powers up, the state of the output latches are undefined. So when you set a pin to output, without setting it's state first, it could go either high or low. Leaving RC1 in the wrong state during the shiftout to the first DPOT.

    After both of the shiftout's execute, things would get back "in sync" again. But then the programs finished at that point. (still assuming single pass)

    Maybe try setting the pins LOW instead of OUTPUT at the beginning.<br><br>
    DT

  6. #6
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    Default In search of brevity

    Darrel
    It seems my efforts to keep the information as brief as possible while containing the relevant parts has lead to some confusion. The three lines of code that cause the problem are in fact part of a subroutine that is called whenever the user presses a button (monitored elsewhere in the prog). It is not just a single pass, sorry.
    At the start of the program code I use the statement TRISC=%11110000 that I hope is setting the ports I am using for the DS1267's to outputs.
    The devilish pulse occurs at EVERY pass of the subroutine.
    Hope this clarifies.
    Muttley

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