Inline Asm Problem

[mark_s]

Hello group,

I am trying to get an adjustable delay routine that is less than 1us increaments i.e (pauseus). I use to program in assembly and had a working delay routine. It took three machine cycles to decrement the counter by one. Using
a 40mhz it should have a 300ns resolution. It is adjustable by taking a adc reading in pbp and passing the variable to the inline assembly routine. When I compile it in PBP3 it produces some errors. Using a PIC18F25K80. If anyone knows why it won't compile or has an alternate idea, I would be greatful.

Thanks
Mark

See screen capture of error messages

' Name  : Asm delay test
'pic18f25k80  10mhz x 4pll 40mhz
'pbp 3.07
'CONFIGS sec osc set to digital i/o,intoscio off, hs-pll on,SECONDARY OSC OFF, ext intructions off
'configs set in melabs u2 programmer
'------------------------------------------------------
DEFINE OSC 40    '64mhz

REFOCON = 0          'Ref osc off
'--------------------------------------------------    
ODCON = 0          '   OPEN DRAIN OFF , CONNECTED TO VDD
'ADC-----------------------------------------------------		    
ADCON0 = %00000101 ' A/D module enabled, channel 1
ADCON1 = %01110000 '%01110000 Vref = INT 4096, TRIG ctmu, NEG REF VSS
ADCON2 = %10010100 ' Right justified, 12 Tad, Frc clock
ANCON1 = %00000000  'Select Digital or Analog AN8 - AN14
SLRCON = 0 'SLEW RATE STANDARD
'-------------------------------------------------------------
'COMPARATOR      '*********SET TRIS INPUTS
CM1CON = 0 '%11000000    'COMPARATOR 1 on all pins external
CM2CON = 0 '%11000000    'COMPARATOR 2 on all pins external              
CVRCON = %00100111    'COMPARATOR vref off
'--------------------------------------------
CTMUCONH = 0  'Charge time measurement unit off
'MSSP-------------------------------------------
SSPSTAT = %00000000   'TX IDLE LOW,SAMPLE MIDDLE
SSPCON1 = 0'%00100001 ' ENABLE MSSP,CLK IDLE LOW,FOSC/4
'-----------------------------------------------------------------------
TRISA = %00000111
TRISB = %00000000
TRISC = %00010000

AUX1 VAR LATC.0  ' output
Delay1 var word 
Temp1  var word
adc_an1 var word


'-------------------------------------------
mainloop:

gosub get_adc 

LATC.0 = 1 'Portc.0 High

; Delay routine 3 cycles for each count. Number of loops = adc read
; at 40mhz delay should have 300ns resolution
ASM      
   movfw  _Delay1
   movwf  _Temp1
   decfsz _Temp1,1
   goto   $-1
Endasm
LATC.0 = 0 'Portc.0 Low

pauseus 500

   Goto mainloop
'------------------------------------------      
get_adc:  '12bit
   ADCON0 = %00000111  'SAMPLE AN1 
                   '
 WHILE ADCON0.1 = 1  'WAIT FOR CONVERSION
    WEND
     ADC_AN1.HIGHBYTE = ADRESH
     ADC_AN1.LOWBYTE  = ADRESL
        DELAY1 = 1 + adc_an1  '1 to 4097
Return
   End

[HenrikOlsson]

Hi Mark,
I'm really bad at assembly language but as far as I can see from the instruction set summary in the datasheet there is no MOVFW instruction.

The Destination adress must be Word aligned-warning is probably because on the 18F series the program counter adresses bytes while the instructions are WORDS so you need jump in increments of 2.

Finally, your variables are WORDs but I'm not sure you're catering for that in your assemble routine but then again, I'm really bad at it so perhaps you are.

/Henrik.

[richard]

Delay1 var word
Temp1 var word

ASM
movfw _Delay1
movwf _Tem p1
decfsz _Temp1,1
goto $-1
Endasm

IT'S a 8 bit cpu how can a 16 bit value fit in a 8 bit register ?

Delay1 var byte  
Temp1  var byte 


asm
       MOVE?BB   _Delay1, _Temp1
DLN    decfsz _Temp1,1
       goto   DLN
endasm

[mark_s]

Thanks Henrik,

On your first point, I'll restudy the data sheet for the proper command. I might of reversed the WF when entering the code.

Second point makes sense also. The asm delay routine was being used for pic16f's and worked. I have run into the count by two
before on pic18's. So I know what you mean. Still interested in alternative.

Regards
Mark

[mark_s]

Thanks Richard,

I will give it a try. It's been a long time since I used the code, and It probably was a byte variable.


It compiles fine here. I will try it on hardware later.

Cheers!

[Art]

It’s crying because there’s no such movfw instruction, only movf.

[Art]

Already been said... Captain obvious!