A/D Conversion Clock Select bits confussion ..

[aratti]

Henrik, I am using a rather old pic (18F2620), I still have a couple of hundreds of them. But timing apart your and mine are very similar in the setting of the TAD value and the acquisition time.
As far as TAD value is concerned I can Select value up to Fosc/64 (minimum delay required for 1 TAD = 1.6 us)
As far as ACQUISTION TIME is concerned, I have a range selectable from 2 TAD to 20 TAD. (So you have a lower and upper limits)

I made some experimenting some years ago, using the manual acquisition time, so I could increase/decrease the acquisition time beyond the 2/20 TAD limits. Unfortunatly I was not able to find these data (I have been digging for the whole day without success) but I assure you they were very interesting. The experiment was done taking 100 reading at three specific points of the 10 bits range. First point was fixed to 10 ADC count (low end), second point in the middle at 512 ADC count and the third point at 1012 ADC count (high end). These reading were taken at different acquisition time going from 1 us up to 200 us in steps of 10 us each.
Once, all the data were collected ( they have been collected via RS232 connection and loaded directly into an Excel sheet), the statistic applied were : Average/Standard deviation/standard error.
Looking at the standard error, I noticed an increase in the two extreme regions when the acquisition time was too low or higher than the 2/20 TADs region , no significant variation of standard error were observed in the middle range.
I will continue to search these files (I am sure I still have them somewhere) and If I found them I will post them here in this thread.
But everybody, with some time to spare, can repeat the experiment on his own.
Cheers.
Al