A/D Conversion Clock Select bits confussion ..


Closed Thread
Results 1 to 30 of 30

Hybrid View

  1. #1
    Join Date
    May 2008
    Location
    Italy
    Posts
    825


    Did you find this post helpful? Yes | No

    Default Re: A/D Conversion Clock Select bits confussion ..

    40 us is the value the author arbitrarely gives as acquisition time "sampleus parameter".

    Remember:

    A too high acquisition time will give issues when the analog input approch the V(ref+)

    A too low acquisition time will give issues when the analog input approch the zero

    So, if you do not see any issues in your reading at the extreme of the reading field then the acquisition time used is correct!

    Ciao, complimenti per il tuo italiano!

    Al.
    Last edited by aratti; - 21st July 2015 at 13:37.
    All progress began with an idea

  2. #2
    Join Date
    Aug 2011
    Posts
    453


    Did you find this post helpful? Yes | No

    Default Re: A/D Conversion Clock Select bits confussion ..

    A too high acquisition time will give issues when the analog input approch the V(ref+)
    A too low acquisition time will give issues when the analog input approch the zero
    Where do you get this from?

    The aquisition time is the MINIMUM amount of time you have to wait for the holding capacitor (and it's RC network) to fully charge/discharge to the voltage level you're sampling.

    If you set the acquisition time too low then you won't have allowed enough time for the charge on the capacitor to reach the desired level, and you'll get an incorrect conversion. It doesn't matter so much if the input is near Vref or zero, it'll be wrong.

    If you're measuring a DC voltage, there is no "too high" an aquisition time.

  3. #3
    Join Date
    May 2008
    Location
    Italy
    Posts
    825


    Did you find this post helpful? Yes | No

    Default Re: A/D Conversion Clock Select bits confussion ..

    Where do you get this from?
    From the charging function of a capacitor!

    Al.
    All progress began with an idea

  4. #4
    Join Date
    Aug 2011
    Posts
    453


    Did you find this post helpful? Yes | No

    Default Re: A/D Conversion Clock Select bits confussion ..

    So you're saying that if you wait too long the voltage on your sampling capacitor will be wrong?

    If you put a small RC network across a voltage source, what will the voltage across the capacitor be if you wait a second? A minute? An hour?

  5. #5
    Join Date
    May 2008
    Location
    Italy
    Posts
    825


    Did you find this post helpful? Yes | No

    Default Re: A/D Conversion Clock Select bits confussion ..

    You cannot use the full function because it is foundamentally a logaritmic function. For the ADC convertion you need a linear function. Once time, resistence and capacity are fixed than the charging function depend only from the voltage applied. If during the charging time you do not pass the 1T point of the function, than the charging function can be considered "quasi liner" and the system work. In other words you can deduce the value of the voltage applied. If you pass the 1T point then thing become more complicated since from that point on the function is purely logaritmic.

    Cheers
    Al.
    All progress began with an idea

  6. #6
    Join Date
    Aug 2011
    Posts
    453


    Did you find this post helpful? Yes | No

    Default Re: A/D Conversion Clock Select bits confussion ..

    You're somehow mixing Acquisition time with the linearity of the ADC conversion function.

    For the Acquisition time, you need the sample cap to charge to whatever value you want the ADC to convert. Period.

    The time constant of an RC network is T=RC, and after one T the voltage across the cap is roughly 66% of the input voltage.
    If you look at T vs percent, you get:
    Code:
    1    63.2% 
    2    86.5% 
    3    95.0% 
    4    98.2% 
    5    99.3% 
    10   99.995%
    20   99.9999998%
    If you set the Acquisition time to 1T and then convert the value, you could be VERY wrong... 37% wrong. Of course, that depends on the new input voltage you want to convert and any existing charge on the sample cap, but T gives you a worst-case number.

    For example, an 8-bit ADC (1 part in 256, or 0.39%) would need an acquisition time of better than 5T, but there's nothing wrong with giving it 10T or 20T or 100T, as long as nothing else changes in that time.

    You do not have to hit some magic 1T window trying to get it into a "quasi-linear" range, or guess at things to "see if it's good enough".

  7. #7
    Join Date
    May 2008
    Location
    Italy
    Posts
    825


    Did you find this post helpful? Yes | No

    Default Re: A/D Conversion Clock Select bits confussion ..

    No much to say, just keep your convintions if you are happy with them.

    Al.
    All progress began with an idea

Similar Threads

  1. Replies: 2
    Last Post: - 23rd April 2013, 16:34
  2. DT_INTS-14 /interrupts enable bits / flag bits
    By bogdan in forum mel PIC BASIC Pro
    Replies: 2
    Last Post: - 16th May 2009, 18:42
  3. external clock / internal clock
    By grounded in forum General
    Replies: 4
    Last Post: - 31st May 2008, 17:44
  4. IF or SELECT
    By RYTECH in forum mel PIC BASIC Pro
    Replies: 1
    Last Post: - 31st December 2005, 18:31
  5. Need clever way to convert 10 bits to 8 bits
    By MikeTamu in forum mel PIC BASIC Pro
    Replies: 6
    Last Post: - 2nd September 2005, 15:13

Members who have read this thread : 0

You do not have permission to view the list of names.

Posting Permissions

  • You may not post new threads
  • You may not post replies
  • You may not post attachments
  • You may not edit your posts