Quick question - how to use 0x27 as an address in i2c

[Scampy]

I'm wanting to write to an address of 0x27. PBP seems to suggest that $42 is the format to use, although most conversion charts state that this is 39 not 42 ?

I'm confused as I have two i2c piggy back boards that use I2C and code written to it in PBP fail to do anything to the display (but work fine over serial). I've tried $42 $39 $4E and still it fails to do simple task like turn the backlight off etc)

[Tabsoft]

From the Digole datasheet
"I2C: Slave Mode, 7-bit address, default address is Hex:27"

$27 <<1 = $4E (moves address to upper 7-bits and adds the R/W bit to bit0.

This is the address you use in the I2CWRITE AND I2CREAD commands.


I2C Device Addressing
All I2C addresses are either 7 bits or 10 bits. The use of 10 bit addresses is rare and is not covered here. All of our modules and the common chips you will use will have 7 bit addresses. This means that you can have up to 128 devices on the I2C bus, since a 7bit number can be from 0 to 127. When sending out the 7 bit address, we still always send 8 bits. The extra bit is used to inform the slave if the master is writing to it or reading from it. If the bit is zero the master is writing to the slave. If the bit is 1 the master is reading from the slave. The 7 bit address is placed in the upper 7 bits of the byte and the Read/Write (R/W) bit is in the LSB (Least Significant Bit).



The placement of the 7 bit address in the upper 7 bits of the byte is a source of confusion for the newcomer. It means that to write to address 21, you must actually send out 42 which is 21 moved over by 1 bit. It is probably easier to think of the I2C bus addresses as 8 bit addresses, with even addresses as write only, and the odd addresses as the read address for the same device.


PBP's I2CWRITE and I2CREAD commands require the R/W bit of the Slave address to be 0. PBP will automatically change the R/W bit by itself when it sends the actual bits to the I2C slave device.

From the PBP manual.
"The upper 7 bits of the Control byte contain the control code along with chip select or additional address information, depending on the particular device. The low order bit is an internal flag indicating whether it is a read or write command and should be kept clear."

Hope this helps.