Yes, trying to.
Yes, trying to.
"If we knew what we were doing, it wouldn't be called research"
- Albert Einstein
Okay.
Reading the MRF89XAM9A datasheet on page 7 "1.3.5 VCO TANK TRIM VALUE", it says you need to set VCOT<1:0> = ‘01’.
From Datasheet:
1.3.5 VCO TANK TRIM VALUE
The VCO Trim bits (VCOT<1:0>) in the
GCONREG<2:1> should be set for VCOT<1:0> = ‘01’
for the inductor values of the module.
That would change MC's value of Register 00 from $2E to $2A, and your value of Register 00 from $28 to $2A.
That might explain why the PLL won't lock.
Regards,
TABSoft
OK, changed all registers to your last post.
Added the changes to the 'send something' portion.
Still no received data.
Lost the IRQ0 pulses on the transmitter.
No IRQ0 or IRQ1 pulses on the receiver - have never had any.
Pulses going into SDI and SCK on transmitter.
No pulses on SDO or SCK on the receiver - no surprise there, if it doesn't trip an IRQ line.
I'll look into how to setup the unit for receive all the time?
"If we knew what we were doing, it wouldn't be called research"
- Albert Einstein
Crossed posts.....
I changed the Register 00 to $2A and it still reports PLL bit as '0'.
BUT, on page 30 of the DS it shows $00 for VTune to be determined by the inductors - not $01 ???
Forget it, I was still reading the 140 page DS not the 36 page one for the module.
I get it.....
The RESET pin is tied to an IO on the proc, it is currently held low, but the module datasheet says in a high impedance state.
Wonder if this is my issue? Should I let it float?
Last edited by ecoli-557; - 17th February 2015 at 00:36.
"If we knew what we were doing, it wouldn't be called research"
- Albert Einstein
Made PORTA.1 an input which is tied to the RESET pin, no help either.......
Went back to earlier code and changed register $00 to $2A and have my pulses out of IRQ0 on the transmitter, but still nothing on the receiver.......
Need a sniffer that works!
Last edited by ecoli-557; - 17th February 2015 at 00:55.
"If we knew what we were doing, it wouldn't be called research"
- Albert Einstein
Changed the registers one more time - still no PLL lock being reported.
Below:
I'm frustrated ......Code:RF_Init_Values[0] = $2A 'Standby mode, 915-928 MHz, VTune by inductors, ENABLE R1/P1/S1 RF_Init_Values[1] = $8C 'FSK, max IF gain, Packet Mode RF_Init_Values[2] = $03 '100KHz Freq Dev RF_Init_Values[3] = $07 '25kbps RF_Init_Values[4] = $0C 'for OOK mode, not apliable RF_Init_Values[5] = $01 '16Bytes FIFO, 1 byte threshold FIFO interrupt RF_Init_Values[6] = $77 '915MHz R1 Reg RF_Init_Values[7] = $64 '915MHz P1 Reg RF_Init_Values[8] = $32 '915MHz S1 Reg RF_Init_Values[9] = $74 '920MHz R2 Reg RF_Init_Values[10] = $62 '920MHz P2 Reg RF_Init_Values[11] = $32 '920MHz S2 Reg RF_Init_Values[12] = $38 'config mode for OOK, not apliable RF_Init_Values[13] = $00 'RCV:IRQ0=payload ready + IRQ1=CRC OK 'TX: IRQ1=TXdone RF_Init_Values[14] = $01 'FIFO starts filling when SYNC detected,TXDONE goes hi when done, 'RSSI IRQ when is above level set, enable PLL lock RF_Init_Values[15] = $00 'RSSI interupt level zero - minimum RF_Init_Values[16] = $A3 'default filters config RF_Init_Values[17] = $38 'default filters config RF_Init_Values[18] = $30 'sync word ON, 24bits, 0 errors tolerance RF_Init_Values[19] = $07 'reserved reg RF_Init_Values[20] = $00 'RSII status read register, 0.5dB / bit RF_Init_Values[21] = $00 'OOK config reg RF_Init_Values[22] = $53 '"S" 1st byte of sync word RF_Init_Values[23] = $53 '"S" 2nd byte of sync word RF_Init_Values[24] = $53 '"S" 3rd byte of sync word - my initials! RF_Init_Values[25] = $53 '"S" just in case RF_Init_Values[26] = $72 'Cutoff fcy = 200KHz, output power = 13dBm 0b000 RF_Init_Values[27] = $3C 'clk out disabled - default 427KHz RF_Init_Values[28] = $03 '3 bytes payload RF_Init_Values[29] = $01 'initial MAC ADDRESS, only for test RF_Init_Values[30] = $5E 'Fix Packet Lenght, 3 bytes preamble, whitening ON, CRC ON, Node ADDR|0x00|0xFF filtering RF_Init_Values[31] = $00 'FIFO autocreal enable if CRC fails, Write to FIFO in stby mode
"If we knew what we were doing, it wouldn't be called research"
- Albert Einstein
I now get a PLL lock indication, I put a wait until PLL lock bit was true before moving on.
Still no received data or IRQs however.Code:'Verify PLL Lock Flag PLLwait: bReg_Address = $0E 'FTPRIREG gosub RegisterRead PLL_LOCK = 0 PLL_LOCK = bReg_Value.1 'You can test this bit to see if PLL Is Locked debug "waiting for PLL lock",13 if PLL_LOCK=0 then PLLwait PLLdone: debug "PLL Lock=",bin1 PLL_LOCK,13
Transmitter gives both IRQ0 and IRQ1 outputs - making some progress.
"If we knew what we were doing, it wouldn't be called research"
- Albert Einstein
Progress for sure.
When in TX mode your IRQ0 says you have crossed the FIFO Input threshold and IRQ1 says FIFOFull.
Why don't you try changing your definition of IRQ1 for TX (IRQ1TX) from 0 = FIFOFULL (default) to 1 = TXDONE. This is your RF_Init_Values[13] value.
Then in the Send_Packet: routine after changing the mode to RF_TRANSMITTER, instead of a hard pause 5, use a loop to test for IRQ1 to go high (TXDONE).
This way you can explicitly test for the Transmitter to complete.
Regards,
TABSoft
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