PIC24 clear SPI slave FIFO

[The Master]

Hi,

I'm using a PIC24FJ64GA002 chip as an SPI slave with FIFO buffers enabled. It has CLK, MOSI, MISO and SS pins connected.

The datasheet says:
"A transmission will be aborted when the SSx pin goes high and may be retried at a later time. Each data word is held in SPIxTXB until all bits are transmitted to the receiver"

My code only writes to the transmit FIFO while SSx is asserted. If SSx goes high at any point I want the transmit FIFO to be cleared and my code will retry the send later. The question is, how do I clear the entire transmit FIFO and SPIxTXB?