pic16f72 spi slave - ss pin function

[HenrikOlsson]

Hi Richard,
Yes, I think that will work. When you load SSPBUF it's content will be transparently transfered to the actual shift register (SSPSR, which you can't access "manually") and then just sit there.
When the SS pin on the slave goes low and clock pulses appears on the SCK pin the data in SSPSR get shifted out thru the SDO pin while at the same time SSPSR gets "refilled" from the other end by the data on the SDI pin.

If the SS pin goes high in the middle of the transfer the data in SSPBUF will be untouched. Only when 8 bits have been shifted out/in the data now in SSPSR gets tranfered to SSPBUF where you can grab it and SSPIF gets set.

At least that's how I interpret it.

/Henrik.

[richard]

I will give it a go and reply with results , but not tonight its nearly bed time

[peterdeco1]

On the ISD chips I use, the SS pin is a chip select/enable so you can parallel multiple chips and select which one to enable.